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authorPeter Maydell <peter.maydell@linaro.org>2024-10-16 20:22:08 +0100
committerPeter Maydell <peter.maydell@linaro.org>2024-10-16 20:22:08 +0100
commit08ae519ab8eb6c9abbd97156cb3678f372521501 (patch)
tree2f638d9481dda5846dc4da97e9b736fce90746f1 /include
parentf774a677507966222624a9b2859f06ede7608100 (diff)
parent3e8f019be77d1b648bca0af0121da3bb37766509 (diff)
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Merge tag 'single-binary-20241015' of https://github.com/philmd/qemu into staging
Remove some target-specific endianness knowledge from target/. For MIPS, propagate endianness at the board level, using QOM property. # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmcOihcACgkQ4+MsLN6t # wN4VaRAAor+5gUJiV0OOMQVfP8e1o9ssKcYy9m31zLeii1Iq2M/2oz6YK4OjdQDe # oJ8VRJvBPKC2Bpi14TfKsSGaP8CGNO/hdxcMi71pjHZC+bjHt5Uv0U/7T4XCBWuV # N+85juN1PTc4cci4FkGIXaPB1YWL00L56BDCzja0uhLF4+Xe2eYGVrPXeFCkN/3I # Ky7jHlB/dgzc47kTXvg5snCee2egDFf/x4igwZj6+gWJyo+jubRpwoOqKbK2M0Nd # VvNpBVFNGZMP3Fn9lh45uDOuRWGu6zSIPBVkjoFc+wdGsFsITIMrZ3h46UffsGTJ # F1j6Zsq6hoLbaNRRjZ6OsN6u683oo1lknmWauD62LrjXcX0RlRwRFbMD0AjedR8t # 6+YHg5LlwGg6r/AOtEe28ggXZohB2vjr2V0MJm1x/XgLYhFHoN3//jxn22oOHj4p # 0z3+eDc3Se8JNRV6jPMHbbuTqZqZjRgVFbYN3aMbdoXYzhpYnrPj6f7WQL2smiAW # C2vdswrubQWKou1wcn6rbg0nnMRVTh+GxrtZ3mkgaxNzgNFxsrX8YubMsh77XUcr # mnCGj1tE3hp40xsuSk6yZXY3ZZiTyZasvO1wq4gWOI9le0Zmq+d335F9+IVJ8RlP # YhA+MY5aeomsixVRdmrPrgOfanQiHXv02lsbperU8QFfGRhf2Y8= # =Qydb # -----END PGP SIGNATURE----- # gpg: Signature made Tue 15 Oct 2024 16:28:23 BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'single-binary-20241015' of https://github.com/philmd/qemu: (33 commits) hw/mips: Have mips_cpu_create_with_clock() take an endianness argument hw/mips/cps: Set the vCPU 'cpu-big-endian' property target/mips: Expose MIPSCPU::is_big_endian property target/mips: Use tcg_constant_tl() instead of tcg_gen_movi_tl() target/mips: Use gen_op_addr_addi() when possible target/mips: Have gen_addiupc() expand $pc during translation target/mips: Replace MO_TE by mo_endian() target/mips: Introduce mo_endian() helper target/mips: Remove unused MEMOP_IDX() macro target/mips: Rename unused sysemu argument of OP_LD_ATOMIC() target/mips: Explode MO_TExx -> MO_TE | MO_xx target/mips: Factor mo_endian_rev() out of MXU code target/mips: Convert mips16e decr_and_load/store() macros to functions target/mips: Replace MO_TE by mo_endian_env() in get_pte() target/mips: Introduce mo_endian_env() helper target/mips: Rename cpu_is_bigendian() -> disas_is_bigendian() target/mips: Declare mips_env_is_bigendian() in 'internal.h' hw/xtensa/xtfpga: Remove TARGET_BIG_ENDIAN #ifdef'ry target/ppc: Use tcg_constant_tl() instead of tcg_gen_movi_tl() target/tricore: Use tcg_constant_tl() instead of tcg_gen_movi_tl() ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
-rw-r--r--include/exec/memop.h6
-rw-r--r--include/exec/tswap.h2
-rw-r--r--include/gdbstub/helpers.h4
-rw-r--r--include/hw/mips/cps.h1
-rw-r--r--include/qemu/bswap.h2
5 files changed, 8 insertions, 7 deletions
diff --git a/include/exec/memop.h b/include/exec/memop.h
index b699bf7..acdb40a 100644
--- a/include/exec/memop.h
+++ b/include/exec/memop.h
@@ -164,12 +164,6 @@ static inline MemOp size_memop(unsigned size)
return (MemOp)ctz32(size);
}
-/* Big endianness from MemOp. */
-static inline bool memop_big_endian(MemOp op)
-{
- return (op & MO_BSWAP) == MO_BE;
-}
-
/**
* memop_alignment_bits:
* @memop: MemOp value
diff --git a/include/exec/tswap.h b/include/exec/tswap.h
index b7a4191..ecd4fae 100644
--- a/include/exec/tswap.h
+++ b/include/exec/tswap.h
@@ -28,7 +28,7 @@ bool target_words_bigendian(void);
#ifdef COMPILING_PER_TARGET
#define target_needs_bswap() (HOST_BIG_ENDIAN != TARGET_BIG_ENDIAN)
#else
-#define target_needs_bswap() (target_words_bigendian() != HOST_BIG_ENDIAN)
+#define target_needs_bswap() (HOST_BIG_ENDIAN != target_words_bigendian())
#endif /* COMPILING_PER_TARGET */
static inline uint16_t tswap16(uint16_t s)
diff --git a/include/gdbstub/helpers.h b/include/gdbstub/helpers.h
index 26140ef..6f7cc48 100644
--- a/include/gdbstub/helpers.h
+++ b/include/gdbstub/helpers.h
@@ -95,9 +95,13 @@ static inline uint8_t *gdb_get_reg_ptr(GByteArray *buf, int len)
#if TARGET_LONG_BITS == 64
#define gdb_get_regl(buf, val) gdb_get_reg64(buf, val)
#define ldtul_p(addr) ldq_p(addr)
+#define ldtul_le_p(addr) ldq_le_p(addr)
+#define ldtul_be_p(addr) ldq_be_p(addr)
#else
#define gdb_get_regl(buf, val) gdb_get_reg32(buf, val)
#define ldtul_p(addr) ldl_p(addr)
+#define ldtul_le_p(addr) ldl_le_p(addr)
+#define ldtul_be_p(addr) ldl_be_p(addr)
#endif
#endif /* _GDBSTUB_HELPERS_H_ */
diff --git a/include/hw/mips/cps.h b/include/hw/mips/cps.h
index 04d6362..05ef9f7 100644
--- a/include/hw/mips/cps.h
+++ b/include/hw/mips/cps.h
@@ -38,6 +38,7 @@ struct MIPSCPSState {
uint32_t num_vp;
uint32_t num_irq;
char *cpu_type;
+ bool cpu_is_bigendian;
MemoryRegion container;
MIPSGCRState gcr;
diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h
index ad22910..b915835 100644
--- a/include/qemu/bswap.h
+++ b/include/qemu/bswap.h
@@ -140,6 +140,8 @@ CPU_CONVERT(le, 16, uint16_t)
CPU_CONVERT(le, 32, uint32_t)
CPU_CONVERT(le, 64, uint64_t)
+#undef CPU_CONVERT
+
/*
* Same as cpu_to_le{16,32,64}, except that gcc will figure the result is
* a compile-time constant if you pass in a constant. So this can be