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author | Peter Maydell <peter.maydell@linaro.org> | 2016-06-07 12:54:25 +0100 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2016-06-07 12:54:25 +0100 |
commit | 0601d6a4112a5b0333d2348aa2c3465cc0075ec6 (patch) | |
tree | 5ffd5808261948ec27f3160aece62acc7c20ddcb /include | |
parent | 76462405809d29bab65a3699686998ba124ab942 (diff) | |
parent | 4d6a0680fa425230748a2d91d81be9afe050eeb3 (diff) | |
download | qemu-0601d6a4112a5b0333d2348aa2c3465cc0075ec6.zip qemu-0601d6a4112a5b0333d2348aa2c3465cc0075ec6.tar.gz qemu-0601d6a4112a5b0333d2348aa2c3465cc0075ec6.tar.bz2 |
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.7-20160607' into staging
ppc patch queue for 2016-05-31
Latest patch queue for ppc. Several significant things in here:
* A bunch of patches from BenH fixing things in TCG
- This should fix several regressions introduced by recent
patches for better HV mode support
- It also fixes some other bugs discovered along the way
* Some fixes and cleanups for Mac machine types from Marc
Cave-Ayland
* Preliminary patches towards dynamic DMA window support from Alexey
Kardashevskiy
- This includes a patch to migration code code
* Increase number of hotpluggable memory slots
- Includes a change to KVM generic code, ACKed by Paolo
* Another TCG fix for an SPE instruction
# gpg: Signature made Tue 07 Jun 2016 11:46:57 BST
# gpg: using RSA key 0x6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>"
# gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>"
# gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg: It is not certain that the signature belongs to the owner.
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392
* remotes/dgibson/tags/ppc-for-2.7-20160607: (26 commits)
ppc: Do not take exceptions on unknown SPRs in privileged mode
ppc: Add missing slbfee. instruction on ppc64 BookS processors
ppc: Fix slbia decode
ppc: Fix mtmsr decoding
ppc: POWER7 has lq/stq instructions and stq need to check ISA
ppc: POWER7 had ACOP and PID registers
ppc: Batch TLB flushes on 32-bit 6xx/7xx/7xxx in hash mode
ppc: Fix tlb invalidations on 6xx/7xx/7xxx 32-bit processors
ppc: Properly tag the translation cache based on MMU mode
dbdma: use DMA memory interface for memory accesses
macio: use DMA memory interface for non-block ATAPI transfers
target-ppc: fixup bitrot in mmu_helper.c debug statements
spapr_pci: Drop cannot_instantiate_with_device_add_yet=false
ppc: fix hrfid, tlbia and slbia privilege
ppc: Fix hreg_store_msr() so that non-HV mode cannot alter MSR:HV
ppc: Better figure out if processor has HV mode
spapr: Introduce pseries-2.7 machine type
spapr: Increase hotpluggable memory slots to 256
spapr_pci: Add and export DMA resetting helper
spapr_pci: Reset DMA config on PHB reset
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/hw/pci-host/spapr.h | 2 | ||||
-rw-r--r-- | include/hw/ppc/spapr.h | 14 | ||||
-rw-r--r-- | include/migration/vmstate.h | 10 | ||||
-rw-r--r-- | include/sysemu/kvm.h | 1 |
4 files changed, 21 insertions, 6 deletions
diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h index 03ee006..7848366 100644 --- a/include/hw/pci-host/spapr.h +++ b/include/hw/pci-host/spapr.h @@ -147,4 +147,6 @@ static inline void spapr_phb_vfio_reset(DeviceState *qdev) } #endif +void spapr_phb_dma_reset(sPAPRPHBState *sphb); + #endif /* __HW_SPAPR_PCI_H__ */ diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 815d5ee..971df3d 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -539,10 +539,12 @@ struct sPAPRTCETable { uint64_t bus_offset; uint32_t page_shift; uint64_t *table; + uint32_t mig_nb_table; + uint64_t *mig_table; bool bypass; bool need_vfio; int fd; - MemoryRegion iommu; + MemoryRegion root, iommu; struct VIOsPAPRDevice *vdev; /* for @bypass migration compatibility only */ QLIST_ENTRY(sPAPRTCETable) list; }; @@ -561,11 +563,11 @@ void spapr_events_fdt_skel(void *fdt, uint32_t epow_irq); int spapr_h_cas_compose_response(sPAPRMachineState *sm, target_ulong addr, target_ulong size, bool cpu_update, bool memory_update); -sPAPRTCETable *spapr_tce_new_table(DeviceState *owner, uint32_t liobn, - uint64_t bus_offset, - uint32_t page_shift, - uint32_t nb_table, - bool need_vfio); +sPAPRTCETable *spapr_tce_new_table(DeviceState *owner, uint32_t liobn); +void spapr_tce_table_enable(sPAPRTCETable *tcet, + uint32_t page_shift, uint64_t bus_offset, + uint32_t nb_table); +void spapr_tce_table_disable(sPAPRTCETable *tcet); void spapr_tce_set_need_vfio(sPAPRTCETable *tcet, bool need_vfio); MemoryRegion *spapr_tce_get_iommu(sPAPRTCETable *tcet); diff --git a/include/migration/vmstate.h b/include/migration/vmstate.h index 30ecc44..6c65811 100644 --- a/include/migration/vmstate.h +++ b/include/migration/vmstate.h @@ -386,6 +386,16 @@ extern const VMStateInfo vmstate_info_bitmap; .offset = vmstate_offset_pointer(_state, _field, _type), \ } +#define VMSTATE_VARRAY_UINT32_ALLOC(_field, _state, _field_num, _version, _info, _type) {\ + .name = (stringify(_field)), \ + .version_id = (_version), \ + .num_offset = vmstate_offset_value(_state, _field_num, uint32_t),\ + .info = &(_info), \ + .size = sizeof(_type), \ + .flags = VMS_VARRAY_UINT32|VMS_POINTER|VMS_ALLOC, \ + .offset = vmstate_offset_pointer(_state, _field, _type), \ +} + #define VMSTATE_VARRAY_UINT16_UNSAFE(_field, _state, _field_num, _version, _info, _type) {\ .name = (stringify(_field)), \ .version_id = (_version), \ diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h index 65569ed..ad6f837 100644 --- a/include/sysemu/kvm.h +++ b/include/sysemu/kvm.h @@ -527,4 +527,5 @@ int kvm_set_one_reg(CPUState *cs, uint64_t id, void *source); * Returns: 0 on success, or a negative errno on failure. */ int kvm_get_one_reg(CPUState *cs, uint64_t id, void *target); +int kvm_get_max_memslots(void); #endif |