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author | Frédéric Pétrot <frederic.petrot@univ-grenoble-alpes.fr> | 2022-01-06 22:01:00 +0100 |
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committer | Alistair Francis <alistair.francis@wdc.com> | 2022-01-08 15:46:10 +1000 |
commit | 568f247f69f9297a7a8816f46ce74a265a96ca8d (patch) | |
tree | f3667184c276a2ad2ff17d3602161130d65a032d /include/qemu | |
parent | a2f827ff4f4486b8aa8fce180452463ec2b62f53 (diff) | |
download | qemu-568f247f69f9297a7a8816f46ce74a265a96ca8d.zip qemu-568f247f69f9297a7a8816f46ce74a265a96ca8d.tar.gz qemu-568f247f69f9297a7a8816f46ce74a265a96ca8d.tar.bz2 |
target/riscv: support for 128-bit bitwise instructions
The 128-bit bitwise instructions do not need any function prototype change
as the functions can be applied independently on the lower and upper part of
the registers.
Signed-off-by: Frédéric Pétrot <frederic.petrot@univ-grenoble-alpes.fr>
Co-authored-by: Fabien Portas <fabien.portas@grenoble-inp.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20220106210108.138226-11-frederic.petrot@univ-grenoble-alpes.fr
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'include/qemu')
0 files changed, 0 insertions, 0 deletions