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| author | Jamin Lin <jamin_lin@aspeedtech.com> | 2024-06-04 13:44:31 +0800 |
|---|---|---|
| committer | Cédric Le Goater <clg@redhat.com> | 2024-06-16 21:08:54 +0200 |
| commit | bdb3748dba309cba0bf71ca6ea4521911953b825 (patch) | |
| tree | 531bfce4ab4e727638d08144455daab40017d988 /include/qemu/rcu.h | |
| parent | 0559e60669bae9c047cd5cf6f9be38ea7ced39b2 (diff) | |
| download | qemu-bdb3748dba309cba0bf71ca6ea4521911953b825.zip qemu-bdb3748dba309cba0bf71ca6ea4521911953b825.tar.gz qemu-bdb3748dba309cba0bf71ca6ea4521911953b825.tar.bz2 | |
aspeed/smc: Add AST2700 support
AST2700 fmc/spi controller's address decoding unit is 64KB
and only bits [31:16] are used for decoding. Introduce seg_to_reg
and reg_to_seg handlers for ast2700 fmc/spi controller.
In addition, adds ast2700 fmc, spi0, spi1, and spi2 class init handler.
AST2700 is a 64 bits quad core CPUs(Cortex-a35). Introduce a new
"aspeed_2700_smc_flash_ops" and set its valid "max_access_size"
8 for 64 bits data format access.
Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Diffstat (limited to 'include/qemu/rcu.h')
0 files changed, 0 insertions, 0 deletions