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author | Peter Maydell <peter.maydell@linaro.org> | 2023-04-24 16:28:33 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2023-05-02 15:47:41 +0100 |
commit | 2c5fa0778c3b4307f9f3af7f27886c46d129c62f (patch) | |
tree | 2a9180a265310f4f1a4358975ed90a97db24649f /include/qemu/host-utils.h | |
parent | 0acbdb4c4ab6b0a09f159bae4899b0737cf64242 (diff) | |
download | qemu-2c5fa0778c3b4307f9f3af7f27886c46d129c62f.zip qemu-2c5fa0778c3b4307f9f3af7f27886c46d129c62f.tar.gz qemu-2c5fa0778c3b4307f9f3af7f27886c46d129c62f.tar.bz2 |
hw/intc/allwinner-a10-pic: Don't use set_bit()/clear_bit()
The Allwinner PIC model uses set_bit() and clear_bit() to update the
values in its irq_pending[] array when an interrupt arrives. However
it is using these functions wrongly: they work on an array of type
'long', and it is passing an array of type 'uint32_t'. Because the
code manually figures out the right array element, this works on
little-endian hosts and on 32-bit big-endian hosts, where bits 0..31
in a 'long' are in the same place as they are in a 'uint32_t'.
However it breaks on 64-bit big-endian hosts.
Remove the use of set_bit() and clear_bit() in favour of using
deposit32() on the array element. This fixes a bug where on
big-endian 64-bit hosts the guest kernel would hang early on in
bootup.
Cc: qemu-stable@nongnu.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20230424152833.1334136-1-peter.maydell@linaro.org
Diffstat (limited to 'include/qemu/host-utils.h')
0 files changed, 0 insertions, 0 deletions