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author | Andreas Färber <afaerber@suse.de> | 2013-08-03 00:18:51 +0200 |
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committer | Andreas Färber <afaerber@suse.de> | 2014-02-14 16:22:31 +0100 |
commit | a5c828525e82dbf9f78dcc15070dd49025471afe (patch) | |
tree | fd6e0ad32b08aa2418374d59e8607e3923266343 /include/hw | |
parent | 6749695eaaf346c1667067e17ecc9d7d64b7f61c (diff) | |
download | qemu-a5c828525e82dbf9f78dcc15070dd49025471afe.zip qemu-a5c828525e82dbf9f78dcc15070dd49025471afe.tar.gz qemu-a5c828525e82dbf9f78dcc15070dd49025471afe.tar.bz2 |
i2c: Rename i2c_bus to I2CBus
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'include/hw')
-rw-r--r-- | include/hw/arm/exynos4210.h | 2 | ||||
-rw-r--r-- | include/hw/arm/omap.h | 2 | ||||
-rw-r--r-- | include/hw/arm/pxa.h | 2 | ||||
-rw-r--r-- | include/hw/i2c/i2c.h | 16 | ||||
-rw-r--r-- | include/hw/i2c/pm_smbus.h | 2 | ||||
-rw-r--r-- | include/hw/i2c/smbus.h | 20 | ||||
-rw-r--r-- | include/hw/i386/ich9.h | 2 | ||||
-rw-r--r-- | include/hw/i386/pc.h | 6 | ||||
-rw-r--r-- | include/hw/isa/vt82c686.h | 4 |
9 files changed, 28 insertions, 28 deletions
diff --git a/include/hw/arm/exynos4210.h b/include/hw/arm/exynos4210.h index bb9a1dd..5c1820f 100644 --- a/include/hw/arm/exynos4210.h +++ b/include/hw/arm/exynos4210.h @@ -97,7 +97,7 @@ typedef struct Exynos4210State { MemoryRegion dram1_mem; MemoryRegion boot_secondary; MemoryRegion bootreg_mem; - i2c_bus *i2c_if[EXYNOS4210_I2C_NUMBER]; + I2CBus *i2c_if[EXYNOS4210_I2C_NUMBER]; } Exynos4210State; void exynos4210_write_secondary(ARMCPU *cpu, diff --git a/include/hw/arm/omap.h b/include/hw/arm/omap.h index 188cda8..b9655ee 100644 --- a/include/hw/arm/omap.h +++ b/include/hw/arm/omap.h @@ -765,7 +765,7 @@ void omap_mmc_handlers(struct omap_mmc_s *s, qemu_irq ro, qemu_irq cover); void omap_mmc_enable(struct omap_mmc_s *s, int enable); /* omap_i2c.c */ -i2c_bus *omap_i2c_bus(DeviceState *omap_i2c); +I2CBus *omap_i2c_bus(DeviceState *omap_i2c); # define cpu_is_omap310(cpu) (cpu->mpu_model == omap310) # define cpu_is_omap1510(cpu) (cpu->mpu_model == omap1510) diff --git a/include/hw/arm/pxa.h b/include/hw/arm/pxa.h index 7ca330a..c507906 100644 --- a/include/hw/arm/pxa.h +++ b/include/hw/arm/pxa.h @@ -116,7 +116,7 @@ void pxa27x_register_keypad(PXA2xxKeyPadState *kp, typedef struct PXA2xxI2CState PXA2xxI2CState; PXA2xxI2CState *pxa2xx_i2c_init(hwaddr base, qemu_irq irq, uint32_t page_size); -i2c_bus *pxa2xx_i2c_bus(PXA2xxI2CState *s); +I2CBus *pxa2xx_i2c_bus(PXA2xxI2CState *s); typedef struct PXA2xxI2SState PXA2xxI2SState; typedef struct PXA2xxFIrState PXA2xxFIrState; diff --git a/include/hw/i2c/i2c.h b/include/hw/i2c/i2c.h index 461392f..9df987b 100644 --- a/include/hw/i2c/i2c.h +++ b/include/hw/i2c/i2c.h @@ -50,18 +50,18 @@ struct I2CSlave uint8_t address; }; -i2c_bus *i2c_init_bus(DeviceState *parent, const char *name); +I2CBus *i2c_init_bus(DeviceState *parent, const char *name); void i2c_set_slave_address(I2CSlave *dev, uint8_t address); -int i2c_bus_busy(i2c_bus *bus); -int i2c_start_transfer(i2c_bus *bus, uint8_t address, int recv); -void i2c_end_transfer(i2c_bus *bus); -void i2c_nack(i2c_bus *bus); -int i2c_send(i2c_bus *bus, uint8_t data); -int i2c_recv(i2c_bus *bus); +int i2c_bus_busy(I2CBus *bus); +int i2c_start_transfer(I2CBus *bus, uint8_t address, int recv); +void i2c_end_transfer(I2CBus *bus); +void i2c_nack(I2CBus *bus); +int i2c_send(I2CBus *bus, uint8_t data); +int i2c_recv(I2CBus *bus); #define FROM_I2C_SLAVE(type, dev) DO_UPCAST(type, i2c, dev) -DeviceState *i2c_create_slave(i2c_bus *bus, const char *name, uint8_t addr); +DeviceState *i2c_create_slave(I2CBus *bus, const char *name, uint8_t addr); /* wm8750.c */ void wm8750_data_req_set(DeviceState *dev, diff --git a/include/hw/i2c/pm_smbus.h b/include/hw/i2c/pm_smbus.h index e3069bf..926603f 100644 --- a/include/hw/i2c/pm_smbus.h +++ b/include/hw/i2c/pm_smbus.h @@ -2,7 +2,7 @@ #define PM_SMBUS_H typedef struct PMSMBus { - i2c_bus *smbus; + I2CBus *smbus; MemoryRegion io; uint8_t smb_stat; diff --git a/include/hw/i2c/smbus.h b/include/hw/i2c/smbus.h index d764d75..63f0cc4 100644 --- a/include/hw/i2c/smbus.h +++ b/include/hw/i2c/smbus.h @@ -66,18 +66,18 @@ struct SMBusDevice { }; /* Master device commands. */ -void smbus_quick_command(i2c_bus *bus, uint8_t addr, int read); -uint8_t smbus_receive_byte(i2c_bus *bus, uint8_t addr); -void smbus_send_byte(i2c_bus *bus, uint8_t addr, uint8_t data); -uint8_t smbus_read_byte(i2c_bus *bus, uint8_t addr, uint8_t command); -void smbus_write_byte(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t data); -uint16_t smbus_read_word(i2c_bus *bus, uint8_t addr, uint8_t command); -void smbus_write_word(i2c_bus *bus, uint8_t addr, uint8_t command, uint16_t data); -int smbus_read_block(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t *data); -void smbus_write_block(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t *data, +void smbus_quick_command(I2CBus *bus, uint8_t addr, int read); +uint8_t smbus_receive_byte(I2CBus *bus, uint8_t addr); +void smbus_send_byte(I2CBus *bus, uint8_t addr, uint8_t data); +uint8_t smbus_read_byte(I2CBus *bus, uint8_t addr, uint8_t command); +void smbus_write_byte(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t data); +uint16_t smbus_read_word(I2CBus *bus, uint8_t addr, uint8_t command); +void smbus_write_word(I2CBus *bus, uint8_t addr, uint8_t command, uint16_t data); +int smbus_read_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data); +void smbus_write_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data, int len); -void smbus_eeprom_init(i2c_bus *smbus, int nb_eeprom, +void smbus_eeprom_init(I2CBus *smbus, int nb_eeprom, const uint8_t *eeprom_spd, int size); #endif diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h index 4a68b35..9e4a0e4 100644 --- a/include/hw/i386/ich9.h +++ b/include/hw/i386/ich9.h @@ -20,7 +20,7 @@ int ich9_lpc_map_irq(PCIDevice *pci_dev, int intx); PCIINTxRoute ich9_route_intx_pin_to_irq(void *opaque, int pirq_pin); void ich9_lpc_pm_init(PCIDevice *pci_lpc); PCIBus *ich9_d2pbr_init(PCIBus *bus, int devfn, int sec_bus); -i2c_bus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base); +I2CBus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base); #define ICH9_CC_SIZE (16 * 1024) /* 16KB */ diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 3e1e81b..9010246 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -165,9 +165,9 @@ void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); /* acpi_piix.c */ -i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, - qemu_irq sci_irq, qemu_irq smi_irq, - int kvm_enabled, FWCfgState *fw_cfg); +I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, + qemu_irq sci_irq, qemu_irq smi_irq, + int kvm_enabled, FWCfgState *fw_cfg); void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); /* hpet.c */ diff --git a/include/hw/isa/vt82c686.h b/include/hw/isa/vt82c686.h index 6ef876d..471b5e9 100644 --- a/include/hw/isa/vt82c686.h +++ b/include/hw/isa/vt82c686.h @@ -5,7 +5,7 @@ ISABus *vt82c686b_init(PCIBus * bus, int devfn); void vt82c686b_ac97_init(PCIBus *bus, int devfn); void vt82c686b_mc97_init(PCIBus *bus, int devfn); -i2c_bus *vt82c686b_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, - qemu_irq sci_irq); +I2CBus *vt82c686b_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, + qemu_irq sci_irq); #endif |