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author | Peter Maydell <peter.maydell@linaro.org> | 2021-08-12 10:33:44 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2021-09-01 11:08:19 +0100 |
commit | 66e6a43818734a2423dcfcd5bf52a33df86e89aa (patch) | |
tree | 30f61e0ea15a18d80b7192bbaad6511c88d78a20 /include/hw | |
parent | 68ba05fba411a9dd7281498c7f7aae05e0b76005 (diff) | |
download | qemu-66e6a43818734a2423dcfcd5bf52a33df86e89aa.zip qemu-66e6a43818734a2423dcfcd5bf52a33df86e89aa.tar.gz qemu-66e6a43818734a2423dcfcd5bf52a33df86e89aa.tar.bz2 |
hw/arm/stm32f405: Wire up sysclk and refclk
Wire up the sysclk and refclk for the stm32f405 SoC. This SoC always
runs the systick refclk at 1/8 the frequency of the main CPU clock,
so the board code only needs to provide a single sysclk clock.
Because there is only one board using this SoC, we convert the SoC
and the board together, rather than splitting it into "add clock to
SoC; connect clock in board; add error check in SoC code that clock
is wired up".
When the systick device starts honouring its clock inputs, this will
fix an emulation inaccuracy in the netduinoplus2 board where the
systick reference clock was running at 1MHz rather than 21MHz.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Alexandre Iooss <erdnaxe@crans.org>
Reviewed-by: Luc Michel <luc@lmichel.fr>
Message-id: 20210812093356.1946-14-peter.maydell@linaro.org
Diffstat (limited to 'include/hw')
-rw-r--r-- | include/hw/arm/stm32f405_soc.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/hw/arm/stm32f405_soc.h b/include/hw/arm/stm32f405_soc.h index 347105e..5bb0c8d 100644 --- a/include/hw/arm/stm32f405_soc.h +++ b/include/hw/arm/stm32f405_soc.h @@ -68,6 +68,9 @@ struct STM32F405State { MemoryRegion sram; MemoryRegion flash; MemoryRegion flash_alias; + + Clock *sysclk; + Clock *refclk; }; #endif |