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| author | Cédric Le Goater <clg@kaod.org> | 2021-12-17 17:57:19 +0100 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2021-12-17 17:57:19 +0100 |
| commit | 422fd92e613ab6b5239538bf2dc1202eb9d3f0f5 (patch) | |
| tree | da188b260ce7f96a34bdac5b049ba43347bc3a54 /include/hw | |
| parent | 2ff73dda02d8a467ab56a0e497df7888a15af0c3 (diff) | |
| download | qemu-422fd92e613ab6b5239538bf2dc1202eb9d3f0f5.zip qemu-422fd92e613ab6b5239538bf2dc1202eb9d3f0f5.tar.gz qemu-422fd92e613ab6b5239538bf2dc1202eb9d3f0f5.tar.bz2 | |
ppc/pnv: Introduce a num_pecs class attribute for PHB4 PEC devices
POWER9 processor comes with 3 PHB4 PEC (PCI Express Controller) and
each PEC can have several PHBs :
* PEC0 provides 1 PHB (PHB0)
* PEC1 provides 2 PHBs (PHB1 and PHB2)
* PEC2 provides 3 PHBs (PHB3, PHB4 and PHB5)
A num_pecs class attribute represents better the logic units of the
POWER9 chip. Use that instead of num_phbs which fits POWER8 chips.
This will ease adding support for user created devices.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20211213132830.108372-8-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'include/hw')
| -rw-r--r-- | include/hw/ppc/pnv.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index aa08d79..c781525 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -53,6 +53,7 @@ struct PnvChip { PnvCore **cores; uint32_t num_phbs; + uint32_t num_pecs; MemoryRegion xscom_mmio; MemoryRegion xscom; @@ -136,6 +137,7 @@ struct PnvChipClass { uint64_t chip_cfam_id; uint64_t cores_mask; uint32_t num_phbs; + uint32_t num_pecs; DeviceRealize parent_realize; |