diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2024-02-03 13:31:44 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-02-03 13:31:45 +0000 |
| commit | 10eab96e1a03538ad658faed2afb680f041cc361 (patch) | |
| tree | c8e68f72d596717ee98a9b867ac7dcc03d23d152 /include/hw | |
| parent | 4f2fdb10b5f78ba95300648fce74c42d3e4511c7 (diff) | |
| parent | 6400be014f80e4c2c246eb8be709ea3a96428233 (diff) | |
| download | qemu-10eab96e1a03538ad658faed2afb680f041cc361.zip qemu-10eab96e1a03538ad658faed2afb680f041cc361.tar.gz qemu-10eab96e1a03538ad658faed2afb680f041cc361.tar.bz2 | |
Merge tag 'pull-tcg-20240202-2' of https://gitlab.com/rth7680/qemu into staging
tests/tcg: Fix multiarch/gdbstub/prot-none.py
hw/core: Convert cpu_mmu_index to a CPUClass hook
tcg/loongarch64: Set vector registers call clobbered
target/sparc: floating-point cleanup
linux-user/aarch64: Add padding before __kernel_rt_sigreturn
# -----BEGIN PGP SIGNATURE-----
#
# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmW95WkdHHJpY2hhcmQu
# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV/p+Qf/eVmh5q0pZqcur7ft
# 8FO0wlIz55OfhaA9MIpH7LEIHRKY37Ybebw2K6SPnx4FmPhLkaj4KXPPjT2nzdXw
# J2nQM+TOyxOd18GG8P80qFQ1a72dj8VSIRVAl9T46KuPXS5B7luArImfBlUk/GwV
# Qr/XkOPwVTp05E/ccMJ8PMlcVZw9osHVLqsaFVbsUv/FylTmstzA9c5Gw7/FTfkG
# T2rk+7go+F4IXs/9uQuuFMOpQOZngXE621hnro+qle7j9oarEUVJloAgVn06o59O
# fUjuoKO0aMCr2iQqNJTH7Dnqp5OIzzxUoXiNTOj0EimwWfAcUKthoFO2LGcy1/ew
# wWNR/Q==
# =e3J3
# -----END PGP SIGNATURE-----
# gpg: Signature made Sat 03 Feb 2024 07:04:09 GMT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-tcg-20240202-2' of https://gitlab.com/rth7680/qemu: (58 commits)
linux-user/aarch64: Add padding before __kernel_rt_sigreturn
target/sparc: Remove FSR_FTT_NMASK, FSR_FTT_CEXC_NMASK
target/sparc: Split fcc out of env->fsr
target/sparc: Remove cpu_fsr
target/sparc: Split cexc and ftt from env->fsr
target/sparc: Merge check_ieee_exceptions with FPop helpers
target/sparc: Clear cexc and ftt in do_check_ieee_exceptions
target/sparc: Split ver from env->fsr
target/sparc: Introduce cpu_get_fsr, cpu_put_fsr
target/sparc: Remove qt0, qt1 temporaries
target/sparc: Use i128 for Fdmulq
target/sparc: Use i128 for FdTOq, FxTOq
target/sparc: Use i128 for FsTOq, FiTOq
target/sparc: Use i128 for FCMPq, FCMPEq
target/sparc: Use i128 for FqTOd, FqTOx
target/sparc: Use i128 for FqTOs, FqTOi
target/sparc: Use i128 for FADDq, FSUBq, FMULq, FDIVq
target/sparc: Use i128 for FSQRTq
target/sparc: Inline FNEG, FABS
target/sparc: Introduce gen_{load,store}_fpr_Q
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw')
| -rw-r--r-- | include/hw/core/cpu.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 2c284d6..4385ce5 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -103,6 +103,8 @@ struct SysemuCPUOps; * @parse_features: Callback to parse command line arguments. * @reset_dump_flags: #CPUDumpFlags to use for reset logging. * @has_work: Callback for checking if there is work to do. + * @mmu_index: Callback for choosing softmmu mmu index; + * may be used internally by memory_rw_debug without TCG. * @memory_rw_debug: Callback for GDB memory access. * @dump_state: Callback for dumping state. * @query_cpu_fast: @@ -150,6 +152,7 @@ struct CPUClass { void (*parse_features)(const char *typename, char *str, Error **errp); bool (*has_work)(CPUState *cpu); + int (*mmu_index)(CPUState *cpu, bool ifetch); int (*memory_rw_debug)(CPUState *cpu, vaddr addr, uint8_t *buf, int len, bool is_write); void (*dump_state)(CPUState *cpu, FILE *, int flags); |