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| author | Jamin Lin <jamin_lin@aspeedtech.com> | 2024-07-04 16:29:16 +0800 |
|---|---|---|
| committer | Cédric Le Goater <clg@redhat.com> | 2024-07-09 08:05:44 +0200 |
| commit | 0b51fd0f99f09df4560c267922cabdbc67198ae8 (patch) | |
| tree | 1bdbca793314cb6b1840f8815dcd1d0a9e5eb67e /include/hw | |
| parent | eec2f9cc69ba68c09dfba6812f58e550c1e83d68 (diff) | |
| download | qemu-0b51fd0f99f09df4560c267922cabdbc67198ae8.zip qemu-0b51fd0f99f09df4560c267922cabdbc67198ae8.tar.gz qemu-0b51fd0f99f09df4560c267922cabdbc67198ae8.tar.bz2 | |
hw/net:ftgmac100: update ring base address to 64 bits
Update TX and RX ring base address data type to uint64_t for
64 bits dram address DMA support.
Both "Normal Priority Transmit Ring Base Address Register(0x20)" and
"Receive Ring Base Address Register (0x24)" are used for saving the
low part physical address of descriptor manager.
Therefore, changes to set TX and RX descriptor manager address bits [31:0]
in ftgmac100_read and ftgmac100_write functions.
Incrementing the version of vmstate to 2.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Diffstat (limited to 'include/hw')
| -rw-r--r-- | include/hw/net/ftgmac100.h | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/include/hw/net/ftgmac100.h b/include/hw/net/ftgmac100.h index 269446e..aae57ae 100644 --- a/include/hw/net/ftgmac100.h +++ b/include/hw/net/ftgmac100.h @@ -42,10 +42,6 @@ struct FTGMAC100State { uint32_t isr; uint32_t ier; uint32_t rx_enabled; - uint32_t rx_ring; - uint32_t rx_descriptor; - uint32_t tx_ring; - uint32_t tx_descriptor; uint32_t math[2]; uint32_t rbsr; uint32_t itc; @@ -58,7 +54,10 @@ struct FTGMAC100State { uint32_t phycr; uint32_t phydata; uint32_t fcr; - + uint64_t rx_ring; + uint64_t rx_descriptor; + uint64_t tx_ring; + uint64_t tx_descriptor; uint32_t phy_status; uint32_t phy_control; |