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author | Peter Maydell <peter.maydell@linaro.org> | 2017-07-17 13:36:07 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2017-07-17 13:36:07 +0100 |
commit | 8d92e26b452f8961ec90df3f93cf5f3b7a9d158f (patch) | |
tree | c614b7a6bfc7cfe276edf0d777a0111091636757 /include/hw/timer/cmsdk-apb-timer.h | |
parent | 5cc56cc6872122af318f07088b7d599c3781719f (diff) | |
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target/arm: Make Cortex-M3 and M4 default to 8 PMSA regions
The Cortex-M3 and M4 CPUs always have 8 PMSA MPU regions (this isn't
a configurable option for the hardware). Make the default value of
the pmsav7-dregion property be set per-cpu, so we don't need to have
every user of these CPUs set it manually. (The existing default of
16 is correct for the other PMSAv7 core, the Cortex-R5.)
This fixes a bug where we were creating the M3 and M4 with
too many regions; most guest software would not notice or
care, though, since it would just not use the registers
associated with the unexpected extra regions.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-id: 1499788408-10096-4-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'include/hw/timer/cmsdk-apb-timer.h')
0 files changed, 0 insertions, 0 deletions