diff options
| author | Jamin Lin <jamin_lin@aspeedtech.com> | 2024-06-04 13:44:28 +0800 |
|---|---|---|
| committer | Cédric Le Goater <clg@redhat.com> | 2024-06-16 21:08:54 +0200 |
| commit | 3a6c0f0e9d71e9a5f5bf4d5d31693a2f0cdd71c1 (patch) | |
| tree | 3b041335dfb678a6204eedc0177d59d2354ee97e /include/hw/ssi | |
| parent | d108dfea1967d57d462a0d4af344524fcf9cd23e (diff) | |
| download | qemu-3a6c0f0e9d71e9a5f5bf4d5d31693a2f0cdd71c1.zip qemu-3a6c0f0e9d71e9a5f5bf4d5d31693a2f0cdd71c1.tar.gz qemu-3a6c0f0e9d71e9a5f5bf4d5d31693a2f0cdd71c1.tar.bz2 | |
aspeed/smc: support dma start length and 1 byte length unit
DMA length is from 1 byte to 32MB for AST2600 and AST10x0
and DMA length is from 4 bytes to 32MB for AST2500.
In other words, if "R_DMA_LEN" is 0, it should move at least 1 byte
data for AST2600 and AST10x0 and 4 bytes data for AST2500.
To support all ASPEED SOCs, adds dma_start_length parameter to store
the start length, add helper routines function to compute the dma length
and update DMA_LENGTH mask to "1FFFFFF" to support dma 1 byte
length unit for AST2600 and AST1030.
Currently, only supports dma length 4 bytes aligned.
Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Diffstat (limited to 'include/hw/ssi')
| -rw-r--r-- | include/hw/ssi/aspeed_smc.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/ssi/aspeed_smc.h b/include/hw/ssi/aspeed_smc.h index 8791cc0..d305ce2 100644 --- a/include/hw/ssi/aspeed_smc.h +++ b/include/hw/ssi/aspeed_smc.h @@ -107,6 +107,7 @@ struct AspeedSMCClass { uint32_t features; hwaddr dma_flash_mask; hwaddr dma_dram_mask; + uint32_t dma_start_length; uint32_t nregs; uint32_t (*segment_to_reg)(const AspeedSMCState *s, const AspeedSegments *seg); |