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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2018-01-16 13:28:20 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-01-16 13:28:20 +0000 |
| commit | 5efc9016e52596ec054b19bb0ae1d274f77f2a2b (patch) | |
| tree | 9ac9348b1043178be65b5fd3dcd847124774755a /include/hw/sd | |
| parent | cd2094219f2734cb0e759ffe9d5f4a5493ca1cc9 (diff) | |
| download | qemu-5efc9016e52596ec054b19bb0ae1d274f77f2a2b.zip qemu-5efc9016e52596ec054b19bb0ae1d274f77f2a2b.tar.gz qemu-5efc9016e52596ec054b19bb0ae1d274f77f2a2b.tar.bz2 | |
sdhci: fix CAPAB/MAXCURR registers, both are 64bit and read-only
running qtests:
$ make check-qtest-arm
GTESTER check-qtest-arm
SDHC rd_4b @0x44 not implemented
SDHC wr_4b @0x40 <- 0x89abcdef not implemented
SDHC wr_4b @0x44 <- 0x01234567 not implemented
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Message-id: 20180115182436.2066-12-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/sd')
| -rw-r--r-- | include/hw/sd/sdhci.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h index 8041c96..442e30a 100644 --- a/include/hw/sd/sdhci.h +++ b/include/hw/sd/sdhci.h @@ -72,8 +72,8 @@ typedef struct SDHCIState { uint64_t admasysaddr; /* ADMA System Address Register */ /* Read-only registers */ - uint32_t capareg; /* Capabilities Register */ - uint32_t maxcurr; /* Maximum Current Capabilities Register */ + uint64_t capareg; /* Capabilities Register */ + uint64_t maxcurr; /* Maximum Current Capabilities Register */ uint8_t *fifo_buffer; /* SD host i/o FIFO buffer */ uint32_t buf_maxsz; |