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| author | Glenn Miles <milesg@linux.vnet.ibm.com> | 2023-10-17 17:14:34 -0500 |
|---|---|---|
| committer | Daniel Henrique Barboza <danielhb413@gmail.com> | 2023-11-07 15:49:41 -0300 |
| commit | 1ceda19c28a11cf51ca5f670c50934c66b7785bd (patch) | |
| tree | 45540e4875d926dc4ee512c0debb87fe326fceb8 /include/hw/ppc | |
| parent | 5f0661215454959e98f69e7d3933e793d884282d (diff) | |
| download | qemu-1ceda19c28a11cf51ca5f670c50934c66b7785bd.zip qemu-1ceda19c28a11cf51ca5f670c50934c66b7785bd.tar.gz qemu-1ceda19c28a11cf51ca5f670c50934c66b7785bd.tar.bz2 | |
ppc/pnv: Connect PNV I2C controller to powernv10
Wires up four I2C controller instances to the powernv10 chip
XSCOM address space.
Each controller instance is wired up to two I2C buses of
its own. No other I2C devices are connected to the buses
at this time.
Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-ID: <20231017221434.810363-1-milesg@linux.vnet.ibm.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'include/hw/ppc')
| -rw-r--r-- | include/hw/ppc/pnv_chip.h | 4 | ||||
| -rw-r--r-- | include/hw/ppc/pnv_xscom.h | 3 |
2 files changed, 7 insertions, 0 deletions
diff --git a/include/hw/ppc/pnv_chip.h b/include/hw/ppc/pnv_chip.h index 90cfbad..5815d96 100644 --- a/include/hw/ppc/pnv_chip.h +++ b/include/hw/ppc/pnv_chip.h @@ -120,6 +120,10 @@ struct Pnv10Chip { #define PNV10_CHIP_MAX_PEC 2 PnvPhb4PecState pecs[PNV10_CHIP_MAX_PEC]; + +#define PNV10_CHIP_MAX_I2C 4 +#define PNV10_CHIP_MAX_I2C_PORTS 2 + PnvI2C i2c[PNV10_CHIP_MAX_I2C]; }; #define PNV10_PIR2FUSEDCORE(pir) (((pir) >> 3) & 0xf) diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h index 056392a..f5becba 100644 --- a/include/hw/ppc/pnv_xscom.h +++ b/include/hw/ppc/pnv_xscom.h @@ -152,6 +152,9 @@ struct PnvXScomInterfaceClass { #define PNV10_XSCOM_PSIHB_BASE 0x3011D00 #define PNV10_XSCOM_PSIHB_SIZE 0x100 +#define PNV10_XSCOM_I2CM_BASE PNV9_XSCOM_I2CM_BASE +#define PNV10_XSCOM_I2CM_SIZE PNV9_XSCOM_I2CM_SIZE + #define PNV10_XSCOM_OCC_BASE PNV9_XSCOM_OCC_BASE #define PNV10_XSCOM_OCC_SIZE PNV9_XSCOM_OCC_SIZE |