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author | Mao Zhongyi <maozy.fnst@cn.fujitsu.com> | 2017-06-27 14:16:52 +0800 |
---|---|---|
committer | Michael S. Tsirkin <mst@redhat.com> | 2017-07-03 22:29:49 +0300 |
commit | f8cd1b0201c41d88bb97dcafb80348a0e88d8805 (patch) | |
tree | 870bf5bd0c61a8193a878dfbe508b14ca59a5c1b /include/hw/pci | |
parent | 27841278574a8687d3852dc51b0eeade218339cc (diff) | |
download | qemu-f8cd1b0201c41d88bb97dcafb80348a0e88d8805.zip qemu-f8cd1b0201c41d88bb97dcafb80348a0e88d8805.tar.gz qemu-f8cd1b0201c41d88bb97dcafb80348a0e88d8805.tar.bz2 |
pci: Convert to realize
Convert i82801b11, io3130_upstream, io3130_downstream and
pcie_root_port devices to realize.
Cc: mst@redhat.com
Cc: marcel@redhat.com
Cc: armbru@redhat.com
Signed-off-by: Mao Zhongyi <maozy.fnst@cn.fujitsu.com>
Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'include/hw/pci')
-rw-r--r-- | include/hw/pci/pci_bridge.h | 3 | ||||
-rw-r--r-- | include/hw/pci/pcie.h | 3 |
2 files changed, 4 insertions, 2 deletions
diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h index d5891cd..ff7cbaa 100644 --- a/include/hw/pci/pci_bridge.h +++ b/include/hw/pci/pci_bridge.h @@ -33,7 +33,8 @@ #define PCI_BRIDGE_DEV_PROP_SHPC "shpc" int pci_bridge_ssvid_init(PCIDevice *dev, uint8_t offset, - uint16_t svid, uint16_t ssid); + uint16_t svid, uint16_t ssid, + Error **errp); PCIDevice *pci_bridge_get_device(PCIBus *bus); PCIBus *pci_bridge_get_sec_bus(PCIBridge *br); diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h index 3d8f24b..b71e369 100644 --- a/include/hw/pci/pcie.h +++ b/include/hw/pci/pcie.h @@ -84,7 +84,8 @@ struct PCIExpressDevice { #define COMPAT_PROP_PCP "power_controller_present" /* PCI express capability helper functions */ -int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port); +int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, + uint8_t port, Error **errp); int pcie_cap_v1_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port); int pcie_endpoint_cap_init(PCIDevice *dev, uint8_t offset); |