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author | Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> | 2023-02-16 21:03:47 +0300 |
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committer | Michael S. Tsirkin <mst@redhat.com> | 2023-03-02 03:10:49 -0500 |
commit | 6b72b84d089331f4c49b68fac0f7c5d25748ae46 (patch) | |
tree | 7be1b3581d7610df5fe05c0066474844e2e57e33 /include/hw/pci | |
parent | 0a80f1cd0675838c0a68b00622ec689ebbdb1302 (diff) | |
download | qemu-6b72b84d089331f4c49b68fac0f7c5d25748ae46.zip qemu-6b72b84d089331f4c49b68fac0f7c5d25748ae46.tar.gz qemu-6b72b84d089331f4c49b68fac0f7c5d25748ae46.tar.bz2 |
pcie: drop unused PCIExpressIndicator
The structure type is unused. Also, it's the only user of corresponding
macros, so drop them too.
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Kuchin <antonkuchin@yandex-team.ru>
Message-Id: <20230216180356.156832-10-vsementsov@yandex-team.ru>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'include/hw/pci')
-rw-r--r-- | include/hw/pci/pcie.h | 8 | ||||
-rw-r--r-- | include/hw/pci/pcie_regs.h | 5 |
2 files changed, 0 insertions, 13 deletions
diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h index 798a262..3cc2b15 100644 --- a/include/hw/pci/pcie.h +++ b/include/hw/pci/pcie.h @@ -28,14 +28,6 @@ #include "hw/hotplug.h" typedef enum { - /* for attention and power indicator */ - PCI_EXP_HP_IND_RESERVED = PCI_EXP_SLTCTL_IND_RESERVED, - PCI_EXP_HP_IND_ON = PCI_EXP_SLTCTL_IND_ON, - PCI_EXP_HP_IND_BLINK = PCI_EXP_SLTCTL_IND_BLINK, - PCI_EXP_HP_IND_OFF = PCI_EXP_SLTCTL_IND_OFF, -} PCIExpressIndicator; - -typedef enum { /* these bits must match the bits in Slot Control/Status registers. * PCI_EXP_HP_EV_xxx = PCI_EXP_SLTCTL_xxxE = PCI_EXP_SLTSTA_xxx * diff --git a/include/hw/pci/pcie_regs.h b/include/hw/pci/pcie_regs.h index 00b595a..1fe0bdd 100644 --- a/include/hw/pci/pcie_regs.h +++ b/include/hw/pci/pcie_regs.h @@ -66,11 +66,6 @@ typedef enum PCIExpLinkWidth { #define PCI_EXP_SLTCAP_PSN_SHIFT ctz32(PCI_EXP_SLTCAP_PSN) -#define PCI_EXP_SLTCTL_IND_RESERVED 0x0 -#define PCI_EXP_SLTCTL_IND_ON 0x1 -#define PCI_EXP_SLTCTL_IND_BLINK 0x2 -#define PCI_EXP_SLTCTL_IND_OFF 0x3 - #define PCI_EXP_SLTCTL_SUPPORTED \ (PCI_EXP_SLTCTL_ABPE | \ PCI_EXP_SLTCTL_PDCE | \ |