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| author | Rémi Denis-Courmont <remi.denis.courmont@huawei.com> | 2020-11-02 16:52:16 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-11-02 16:52:16 +0000 |
| commit | 9bd268bae5c4760870522292fb1d46e7da7e372a (patch) | |
| tree | 4791f2115bfca7ada01186e5264a7d75dc0a276b /include/hw/pci-host/xilinx-pcie.h | |
| parent | 373e7ffde9bae90a20fb5db21b053f23091689f4 (diff) | |
| download | qemu-9bd268bae5c4760870522292fb1d46e7da7e372a.zip qemu-9bd268bae5c4760870522292fb1d46e7da7e372a.tar.gz qemu-9bd268bae5c4760870522292fb1d46e7da7e372a.tar.bz2 | |
target/arm: fix LORID_EL1 access check
Secure mode is not exempted from checking SCR_EL3.TLOR, and in the
future HCR_EL2.TLOR when S-EL2 is enabled.
Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/pci-host/xilinx-pcie.h')
0 files changed, 0 insertions, 0 deletions