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| author | Hao Wu <wuhaotsh@google.com> | 2025-02-19 10:45:58 -0800 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2025-02-20 15:22:21 +0000 |
| commit | d9ffb75f2a85a2271dc928849f02f7bada4d1507 (patch) | |
| tree | c36fb5b2b50cd911a9607bf52fde0a848c980c5b /include/hw/misc | |
| parent | 8ca2021b9d3aa3e9ef276bdbf04f89677341955c (diff) | |
| download | qemu-d9ffb75f2a85a2271dc928849f02f7bada4d1507.zip qemu-d9ffb75f2a85a2271dc928849f02f7bada4d1507.tar.gz qemu-d9ffb75f2a85a2271dc928849f02f7bada4d1507.tar.bz2 | |
hw/misc: Add support for NPCM8XX GCR
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Message-id: 20250219184609.1839281-8-wuhaotsh@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/misc')
| -rw-r--r-- | include/hw/misc/npcm_gcr.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/include/hw/misc/npcm_gcr.h b/include/hw/misc/npcm_gcr.h index 9af24e5..9ac76ca 100644 --- a/include/hw/misc/npcm_gcr.h +++ b/include/hw/misc/npcm_gcr.h @@ -1,5 +1,5 @@ /* - * Nuvoton NPCM7xx System Global Control Registers. + * Nuvoton NPCM7xx/8xx System Global Control Registers. * * Copyright 2020 Google LLC * @@ -54,8 +54,9 @@ * Number of registers in our device state structure. Don't change this without * incrementing the version_id in the vmstate. */ -#define NPCM_GCR_MAX_NR_REGS NPCM7XX_GCR_NR_REGS +#define NPCM_GCR_MAX_NR_REGS NPCM8XX_GCR_NR_REGS #define NPCM7XX_GCR_NR_REGS (0x148 / sizeof(uint32_t)) +#define NPCM8XX_GCR_NR_REGS (0xf80 / sizeof(uint32_t)) typedef struct NPCMGCRState { SysBusDevice parent; @@ -78,6 +79,7 @@ typedef struct NPCMGCRClass { #define TYPE_NPCM_GCR "npcm-gcr" #define TYPE_NPCM7XX_GCR "npcm7xx-gcr" +#define TYPE_NPCM8XX_GCR "npcm8xx-gcr" OBJECT_DECLARE_TYPE(NPCMGCRState, NPCMGCRClass, NPCM_GCR) #endif /* NPCM_GCR_H */ |