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| author | Joel Stanley <joel@jms.id.au> | 2022-07-14 16:24:38 +0200 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2022-07-14 16:24:38 +0200 |
| commit | 54ee564132bdbd1346a241dde5d51f0a1d1a1c7b (patch) | |
| tree | 3c62ab5d7dc86b97445925d6a05699c961468f14 /include/hw/misc | |
| parent | 08c9f7eec7002dac2da52c8265eb319aba381c86 (diff) | |
| download | qemu-54ee564132bdbd1346a241dde5d51f0a1d1a1c7b.zip qemu-54ee564132bdbd1346a241dde5d51f0a1d1a1c7b.tar.gz qemu-54ee564132bdbd1346a241dde5d51f0a1d1a1c7b.tar.bz2 | |
aspeed: sbc: Allow per-machine settings
In order to correctly report secure boot running firmware the values
of certain registers must be set.
We don't yet have documentation from ASPEED on what they mean. The
meaning is inferred from u-boot's use of them.
Introduce properties so the settings can be configured per-machine.
Reviewed-by: Peter Delevoryas <pdel@fb.com>
Tested-by: Peter Delevoryas <pdel@fb.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Message-Id: <20220628154740.1117349-4-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'include/hw/misc')
| -rw-r--r-- | include/hw/misc/aspeed_sbc.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/include/hw/misc/aspeed_sbc.h b/include/hw/misc/aspeed_sbc.h index 67e43b5..405e678 100644 --- a/include/hw/misc/aspeed_sbc.h +++ b/include/hw/misc/aspeed_sbc.h @@ -17,9 +17,22 @@ OBJECT_DECLARE_TYPE(AspeedSBCState, AspeedSBCClass, ASPEED_SBC) #define ASPEED_SBC_NR_REGS (0x93c >> 2) +#define QSR_AES BIT(27) +#define QSR_RSA1024 (0x0 << 12) +#define QSR_RSA2048 (0x1 << 12) +#define QSR_RSA3072 (0x2 << 12) +#define QSR_RSA4096 (0x3 << 12) +#define QSR_SHA224 (0x0 << 10) +#define QSR_SHA256 (0x1 << 10) +#define QSR_SHA384 (0x2 << 10) +#define QSR_SHA512 (0x3 << 10) + struct AspeedSBCState { SysBusDevice parent; + bool emmc_abr; + uint32_t signing_settings; + MemoryRegion iomem; uint32_t regs[ASPEED_SBC_NR_REGS]; |