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| author | Cameron Esfahani <dirty@apple.com> | 2020-04-14 21:37:17 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-04-30 11:52:27 +0100 |
| commit | c8aeef3aed6beef14175f9c6744b2ea30fc309d9 (patch) | |
| tree | 35d77da83a0d8c43ee1d79799a01bd4937f718fb /include/hw/gpio | |
| parent | 1633ed1e2de68cc27a1be8ff2a63e09c37e592f5 (diff) | |
| download | qemu-c8aeef3aed6beef14175f9c6744b2ea30fc309d9.zip qemu-c8aeef3aed6beef14175f9c6744b2ea30fc309d9.tar.gz qemu-c8aeef3aed6beef14175f9c6744b2ea30fc309d9.tar.bz2 | |
nrf51: Fix last GPIO CNF address
NRF51_GPIO_REG_CNF_END doesn't actually refer to the start of the last
valid CNF register: it's referring to the last byte of the last valid
CNF register.
This hasn't been a problem up to now, as current implementation in
memory.c turns an unaligned 4-byte read from 0x77f to a single byte read
and the qtest only looks at the least-significant byte of the register.
But when running with patches which fix unaligned accesses in memory.c,
the qtest breaks.
Considering NRF51 doesn't support unaligned accesses, the simplest fix
is to actually set NRF51_GPIO_REG_CNF_END to the start of the last valid
CNF register: 0x77c.
Now, qtests work with or without the unaligned access patches.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Tested-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Cameron Esfahani <dirty@apple.com>
Message-id: 51b427f06838622da783d38ba56e3630d6d85c60.1586925392.git.dirty@apple.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/gpio')
| -rw-r--r-- | include/hw/gpio/nrf51_gpio.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/hw/gpio/nrf51_gpio.h b/include/hw/gpio/nrf51_gpio.h index 337ee53..1d62bbc 100644 --- a/include/hw/gpio/nrf51_gpio.h +++ b/include/hw/gpio/nrf51_gpio.h @@ -42,7 +42,7 @@ #define NRF51_GPIO_REG_DIRSET 0x518 #define NRF51_GPIO_REG_DIRCLR 0x51C #define NRF51_GPIO_REG_CNF_START 0x700 -#define NRF51_GPIO_REG_CNF_END 0x77F +#define NRF51_GPIO_REG_CNF_END 0x77C #define NRF51_GPIO_PULLDOWN 1 #define NRF51_GPIO_PULLUP 3 |