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authorRichard Henderson <richard.henderson@linaro.org>2024-03-01 10:41:07 -1000
committerPeter Maydell <peter.maydell@linaro.org>2024-03-05 13:22:56 +0000
commita0ff4a879cd3198adb4213653d51a39d053ef2d6 (patch)
tree2dbb34a34b978b0e7900f6ecae30df37953c7b4a /include/hw/core
parenta1a85a9502b5d0011320fdf490c1d6bc2f8fdc79 (diff)
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accel/tcg: Add tlb_fill_flags to CPUTLBEntryFull
Allow the target to set tlb flags to apply to all of the comparators. Remove MemTxAttrs.byte_swap, as the bit is not relevant to memory transactions, only the page mapping. Adjust target/sparc to set TLB_BSWAP directly. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240301204110.656742-4-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/core')
-rw-r--r--include/hw/core/cpu.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index d0e3454..ec14f74 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -230,6 +230,9 @@ typedef struct CPUTLBEntryFull {
/* @lg_page_size contains the log2 of the page size. */
uint8_t lg_page_size;
+ /* Additional tlb flags requested by tlb_fill. */
+ uint8_t tlb_fill_flags;
+
/*
* Additional tlb flags for use by the slow path. If non-zero,
* the corresponding CPUTLBEntry comparator must have TLB_FORCE_SLOW.