diff options
| author | Jim Shu <jim.shu@sifive.com> | 2022-04-20 16:09:00 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2022-04-22 10:35:16 +1000 |
| commit | 8124f819d0be0f4953878d07f16edd96e574ab1d (patch) | |
| tree | 7cf20e95da8718549841e7fc04a57944f298ea17 /include/hw/core | |
| parent | e2f01f3c2e13bfe0d143d960e784909d924640f3 (diff) | |
| download | qemu-8124f819d0be0f4953878d07f16edd96e574ab1d.zip qemu-8124f819d0be0f4953878d07f16edd96e574ab1d.tar.gz qemu-8124f819d0be0f4953878d07f16edd96e574ab1d.tar.bz2 | |
hw/intc: riscv_aclint: Add reset function of ACLINT devices
This commit implements reset function of all ACLINT devices.
ACLINT device reset will clear MTIME and MSIP register to 0.
Depend on RISC-V ACLINT spec v1.0-rc4:
https://github.com/riscv/riscv-aclint/blob/v1.0-rc4/riscv-aclint.adoc
Signed-off-by: Jim Shu <jim.shu@sifive.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220420080901.14655-5-frank.chang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'include/hw/core')
0 files changed, 0 insertions, 0 deletions