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| author | Thomas Huth <thuth@redhat.com> | 2019-01-14 13:12:35 +0100 |
|---|---|---|
| committer | Alex Bennée <alex.bennee@linaro.org> | 2019-01-22 20:48:24 +0000 |
| commit | 2c00542c70b9cbd6da510c97cd3d46adcf9e3efc (patch) | |
| tree | 87844830db0c14265a883818c3aa2d7f37381d47 /include/fpu | |
| parent | f6b3b108a808fe07f8a45f82bc88196f668cf627 (diff) | |
| download | qemu-2c00542c70b9cbd6da510c97cd3d46adcf9e3efc.zip qemu-2c00542c70b9cbd6da510c97cd3d46adcf9e3efc.tar.gz qemu-2c00542c70b9cbd6da510c97cd3d46adcf9e3efc.tar.bz2 | |
include/fpu/softfloat: Fix compilation with Clang on s390x
Clang v7.0.1 does not like the __int128 variable type for inline
assembly on s390x:
In file included from fpu/softfloat.c:97:
include/fpu/softfloat-macros.h:647:9: error: inline asm error:
This value type register class is not natively supported!
asm("dlgr %0, %1" : "+r"(n) : "r"(d));
^
Disable this code part there now when compiling with Clang, so that
the generic code gets used instead.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Cornelia Huck <cohuck@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Diffstat (limited to 'include/fpu')
| -rw-r--r-- | include/fpu/softfloat-macros.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/fpu/softfloat-macros.h b/include/fpu/softfloat-macros.h index b1d772e..bd5b641 100644 --- a/include/fpu/softfloat-macros.h +++ b/include/fpu/softfloat-macros.h @@ -641,7 +641,7 @@ static inline uint64_t udiv_qrnnd(uint64_t *r, uint64_t n1, uint64_t q; asm("divq %4" : "=a"(q), "=d"(*r) : "0"(n0), "1"(n1), "rm"(d)); return q; -#elif defined(__s390x__) +#elif defined(__s390x__) && !defined(__clang__) /* Need to use a TImode type to get an even register pair for DLGR. */ unsigned __int128 n = (unsigned __int128)n1 << 64 | n0; asm("dlgr %0, %1" : "+r"(n) : "r"(d)); |