aboutsummaryrefslogtreecommitdiff
path: root/include/exec
diff options
context:
space:
mode:
authorRichard Henderson <richard.henderson@linaro.org>2022-10-21 21:24:40 +1000
committerRichard Henderson <richard.henderson@linaro.org>2023-05-16 15:21:38 -0700
commit37031fefc777a715320f86fc35ee3dd82d9d945e (patch)
treee04cc287d1b1ba26eae2d1aa6ede50272a56b5db /include/exec
parent988998503bc6d8c03fbea001a0513e8372fddf28 (diff)
downloadqemu-37031fefc777a715320f86fc35ee3dd82d9d945e.zip
qemu-37031fefc777a715320f86fc35ee3dd82d9d945e.tar.gz
qemu-37031fefc777a715320f86fc35ee3dd82d9d945e.tar.bz2
include/exec/memop: Add MO_ATOM_*
This field may be used to describe the precise atomicity requirements of the guest, which may then be used to constrain the methods by which it may be emulated by the host. For instance, the AArch64 LDP (32-bit) instruction changes semantics with ARMv8.4 LSE2, from MO_64 | MO_ATOM_IFALIGN_PAIR (64-bits, single-copy atomic only on 4 byte units, nonatomic if not aligned by 4), to MO_64 | MO_ATOM_WITHIN16 (64-bits, single-copy atomic within a 16 byte block) The former may be implemented with two 4 byte loads, or a single 8 byte load if that happens to be efficient on the host. The latter may not be implemented with two 4 byte loads and may also require a helper when misaligned. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include/exec')
-rw-r--r--include/exec/memop.h37
1 files changed, 37 insertions, 0 deletions
diff --git a/include/exec/memop.h b/include/exec/memop.h
index 07f5f88..a86dc67 100644
--- a/include/exec/memop.h
+++ b/include/exec/memop.h
@@ -72,6 +72,43 @@ typedef enum MemOp {
MO_ALIGN_64 = 6 << MO_ASHIFT,
MO_ALIGN = MO_AMASK,
+ /*
+ * MO_ATOM_* describes the atomicity requirements of the operation:
+ * MO_ATOM_IFALIGN: the operation must be single-copy atomic if it
+ * is aligned; if unaligned there is no atomicity.
+ * MO_ATOM_IFALIGN_PAIR: the entire operation may be considered to
+ * be a pair of half-sized operations which are packed together
+ * for convenience, with single-copy atomicity on each half if
+ * the half is aligned.
+ * This is the atomicity e.g. of Arm pre-FEAT_LSE2 LDP.
+ * MO_ATOM_WITHIN16: the operation is single-copy atomic, even if it
+ * is unaligned, so long as it does not cross a 16-byte boundary;
+ * if it crosses a 16-byte boundary there is no atomicity.
+ * This is the atomicity e.g. of Arm FEAT_LSE2 LDR.
+ * MO_ATOM_WITHIN16_PAIR: the entire operation is single-copy atomic,
+ * if it happens to be within a 16-byte boundary, otherwise it
+ * devolves to a pair of half-sized MO_ATOM_WITHIN16 operations.
+ * Depending on alignment, one or both will be single-copy atomic.
+ * This is the atomicity e.g. of Arm FEAT_LSE2 LDP.
+ * MO_ATOM_SUBALIGN: the operation is single-copy atomic by parts
+ * by the alignment. E.g. if the address is 0 mod 4, then each
+ * 4-byte subobject is single-copy atomic.
+ * This is the atomicity e.g. of IBM Power.
+ * MO_ATOM_NONE: the operation has no atomicity requirements.
+ *
+ * Note the default (i.e. 0) value is single-copy atomic to the
+ * size of the operation, if aligned. This retains the behaviour
+ * from before this field was introduced.
+ */
+ MO_ATOM_SHIFT = 8,
+ MO_ATOM_IFALIGN = 0 << MO_ATOM_SHIFT,
+ MO_ATOM_IFALIGN_PAIR = 1 << MO_ATOM_SHIFT,
+ MO_ATOM_WITHIN16 = 2 << MO_ATOM_SHIFT,
+ MO_ATOM_WITHIN16_PAIR = 3 << MO_ATOM_SHIFT,
+ MO_ATOM_SUBALIGN = 4 << MO_ATOM_SHIFT,
+ MO_ATOM_NONE = 5 << MO_ATOM_SHIFT,
+ MO_ATOM_MASK = 7 << MO_ATOM_SHIFT,
+
/* Combinations of the above, for ease of use. */
MO_UB = MO_8,
MO_UW = MO_16,