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| author | Jae Hyun Yoo <quic_jaehyoo@quicinc.com> | 2022-06-30 09:21:13 +0200 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2022-06-30 09:21:13 +0200 |
| commit | fb6b3c8d902ff0fd499bb995c0932cb59a5f1f44 (patch) | |
| tree | 0ac87f11e6650a18337c8a59bf6baa739a92b995 /hw | |
| parent | 85f0e0c3a1ced258ca9b984202a94cc82e7f757c (diff) | |
| download | qemu-fb6b3c8d902ff0fd499bb995c0932cb59a5f1f44.zip qemu-fb6b3c8d902ff0fd499bb995c0932cb59a5f1f44.tar.gz qemu-fb6b3c8d902ff0fd499bb995c0932cb59a5f1f44.tar.bz2 | |
hw/arm/aspeed: add support for the Qualcomm DC-SCM v1 board
Add qcom-dc-scm-v1 board support.
Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20220627154703.148943-2-quic_jaehyoo@quicinc.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/arm/aspeed.c | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index b43dc0f..6e4b287 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -174,6 +174,10 @@ struct AspeedMachineState { #define BLETCHLEY_BMC_HW_STRAP1 AST2600_EVB_HW_STRAP1 #define BLETCHLEY_BMC_HW_STRAP2 AST2600_EVB_HW_STRAP2 +/* Qualcomm DC-SCM hardware value */ +#define QCOM_DC_SCM_V1_BMC_HW_STRAP1 0x00000000 +#define QCOM_DC_SCM_V1_BMC_HW_STRAP2 0x00000041 + #define AST_SMP_MAILBOX_BASE 0x1e6e2180 #define AST_SMP_MBOX_FIELD_ENTRY (AST_SMP_MAILBOX_BASE + 0x0) #define AST_SMP_MBOX_FIELD_GOSIGN (AST_SMP_MAILBOX_BASE + 0x4) @@ -951,6 +955,13 @@ static void fby35_i2c_init(AspeedMachineState *bmc) */ } +static void qcom_dc_scm_bmc_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc = &bmc->soc; + + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 15), "tmp105", 0x4d); +} + static bool aspeed_get_mmio_exec(Object *obj, Error **errp) { return ASPEED_MACHINE(obj)->mmio_exec; @@ -1398,6 +1409,26 @@ static void aspeed_minibmc_machine_ast1030_evb_class_init(ObjectClass *oc, amc->macs_mask = 0; } +static void aspeed_machine_qcom_dc_scm_v1_class_init(ObjectClass *oc, + void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "Qualcomm DC-SCM V1 BMC (Cortex A7)"; + amc->soc_name = "ast2600-a3"; + amc->hw_strap1 = QCOM_DC_SCM_V1_BMC_HW_STRAP1; + amc->hw_strap2 = QCOM_DC_SCM_V1_BMC_HW_STRAP2; + amc->fmc_model = "n25q512a"; + amc->spi_model = "n25q512a"; + amc->num_cs = 2; + amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON; + amc->i2c_init = qcom_dc_scm_bmc_i2c_init; + mc->default_ram_size = 1 * GiB; + mc->default_cpus = mc->min_cpus = mc->max_cpus = + aspeed_soc_num_cpus(amc->soc_name); +}; + static const TypeInfo aspeed_machine_types[] = { { .name = MACHINE_TYPE_NAME("palmetto-bmc"), @@ -1436,6 +1467,10 @@ static const TypeInfo aspeed_machine_types[] = { .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_g220a_class_init, }, { + .name = MACHINE_TYPE_NAME("qcom-dc-scm-v1-bmc"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_qcom_dc_scm_v1_class_init, + }, { .name = MACHINE_TYPE_NAME("fp5280g2-bmc"), .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_fp5280g2_class_init, |