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author | Krzysztof Kozlowski <krzk@kernel.org> | 2017-02-28 12:08:20 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2017-02-28 12:08:20 +0000 |
commit | f3a6339a5bbc160d327299c67bb68c6d07fa4a61 (patch) | |
tree | dc4ed87b1169822c3e7b825d06271647b6032ccf /hw | |
parent | 1e0228fd20aa46ac1f02cffee946cdd4ffaf8b96 (diff) | |
download | qemu-f3a6339a5bbc160d327299c67bb68c6d07fa4a61.zip qemu-f3a6339a5bbc160d327299c67bb68c6d07fa4a61.tar.gz qemu-f3a6339a5bbc160d327299c67bb68c6d07fa4a61.tar.bz2 |
hw/arm/exynos: Fix proper mapping of CPUs by providing real cluster ID
The Exynos4210 has cluster ID 0x9 in its MPIDR register (raw value
0x8000090x). If this cluster ID is not provided, then Linux kernel
cannot map DeviceTree nodes to MPIDR values resulting in kernel
warning and lack of any secondary CPUs:
DT missing boot CPU MPIDR[23:0], fall back to default cpu_logical_map
...
smp: Bringing up secondary CPUs ...
smp: Brought up 1 node, 1 CPU
SMP: Total of 1 processors activated (24.00 BogoMIPS).
Provide a cluster ID so Linux will see proper MPIDR and will try to
bring the secondary CPU online.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Message-id: 20170226200142.31169-2-krzk@kernel.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/arm/exynos4210.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index a0ecbe8..1d2b50c 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -142,6 +142,16 @@ void exynos4210_write_secondary(ARMCPU *cpu, info->smp_loader_start); } +static uint64_t exynos4210_calc_affinity(int cpu) +{ + uint64_t mp_affinity; + + /* Exynos4210 has 0x9 as cluster ID */ + mp_affinity = (0x9 << ARM_AFF1_SHIFT) | cpu; + + return mp_affinity; +} + Exynos4210State *exynos4210_init(MemoryRegion *system_mem, unsigned long ram_size) { @@ -167,6 +177,8 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem, } s->cpu[n] = ARM_CPU(cpuobj); + object_property_set_int(cpuobj, exynos4210_calc_affinity(n), + "mp-affinity", &error_abort); object_property_set_int(cpuobj, EXYNOS4210_SMP_PRIVATE_BASE_ADDR, "reset-cbar", &error_abort); object_property_set_bool(cpuobj, true, "realized", &error_fatal); |