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authorPhilippe Mathieu-Daudé <philmd@linaro.org>2023-02-07 09:02:05 +0100
committerCédric Le Goater <clg@kaod.org>2023-02-07 09:02:05 +0100
commitf16c27a52d6e408328539db6772f2d7a138e5b16 (patch)
tree612657dc43e7aab2be564ec1526db37aa7d96e56 /hw
parent98fb9678da1560f7a625bfa900a1579772627687 (diff)
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hw/arm/aspeed_ast10x0: Add TODO comment to use Cortex-M4F
This SoC uses a Cortex-M4F. QEMU only implements a M4, which is good enough. Add a TODO note in case the M4F is added. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Delevoryas <peter@pjd.dev> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'hw')
-rw-r--r--hw/arm/aspeed_ast10x0.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c
index 5c794c2..649b3b1 100644
--- a/hw/arm/aspeed_ast10x0.c
+++ b/hw/arm/aspeed_ast10x0.c
@@ -420,7 +420,7 @@ static void aspeed_soc_ast1030_class_init(ObjectClass *klass, void *data)
dc->realize = aspeed_soc_ast1030_realize;
sc->name = "ast1030-a1";
- sc->cpu_type = ARM_CPU_TYPE_NAME("cortex-m4");
+ sc->cpu_type = ARM_CPU_TYPE_NAME("cortex-m4"); /* TODO cortex-m4f */
sc->silicon_rev = AST1030_A1_SILICON_REV;
sc->sram_size = 0xc0000;
sc->secsram_size = 0x40000; /* 256 * KiB */