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authorMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>2024-01-12 12:53:07 +0000
committerMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>2024-02-13 19:37:23 +0000
commitf0a24eeed9ec5712d047acf2fb2c52050842793e (patch)
treec64d9870b608d6916a14c30d09bca8ec2b974aa2 /hw
parentabc139cda0817ed4682b6d3eabef65094eb82600 (diff)
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esp.c: remove another set of manual STAT_TC updates
Following on from the recent changes to when the TC is updated, it is now possible to remove another set of manual STAT_TC updates so that its state is now managed within esp_set_tc(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240112125420.514425-16-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Diffstat (limited to 'hw')
-rw-r--r--hw/scsi/esp.c10
1 files changed, 0 insertions, 10 deletions
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index 3fc7417..6fd5c87 100644
--- a/hw/scsi/esp.c
+++ b/hw/scsi/esp.c
@@ -513,7 +513,6 @@ static void handle_satn_stop(ESPState *s)
static void write_response_pdma_cb(ESPState *s)
{
esp_set_phase(s, STAT_ST);
- s->rregs[ESP_RSTAT] |= STAT_TC;
s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC;
s->rregs[ESP_RSEQ] = SEQ_CD;
esp_raise_irq(s);
@@ -532,7 +531,6 @@ static void write_response(ESPState *s)
if (s->dma_memory_write) {
s->dma_memory_write(s->dma_opaque, buf, 2);
esp_set_phase(s, STAT_ST);
- s->rregs[ESP_RSTAT] |= STAT_TC;
s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC;
s->rregs[ESP_RSEQ] = SEQ_CD;
} else {
@@ -550,10 +548,8 @@ static void write_response(ESPState *s)
static void esp_dma_done(ESPState *s)
{
- s->rregs[ESP_RSTAT] |= STAT_TC;
s->rregs[ESP_RINTR] |= INTR_BS;
s->rregs[ESP_RFLAGS] = 0;
- esp_set_tc(s, 0);
esp_raise_irq(s);
}
@@ -592,7 +588,6 @@ static void do_dma_pdma_cb(ESPState *s)
*/
s->cmdfifo_cdb_offset = fifo8_num_used(&s->cmdfifo);
esp_set_phase(s, STAT_CD);
- s->rregs[ESP_RSTAT] |= STAT_TC;
s->rregs[ESP_RSEQ] = SEQ_CD;
s->rregs[ESP_RINTR] |= INTR_BS;
esp_raise_irq(s);
@@ -699,7 +694,6 @@ static void esp_do_dma(ESPState *s)
*/
s->cmdfifo_cdb_offset = fifo8_num_used(&s->cmdfifo);
esp_set_phase(s, STAT_CD);
- s->rregs[ESP_RSTAT] |= STAT_TC;
s->rregs[ESP_RSEQ] = SEQ_CD;
s->rregs[ESP_RINTR] |= INTR_BS;
esp_raise_irq(s);
@@ -829,7 +823,6 @@ static void esp_do_nodma(ESPState *s)
*/
s->cmdfifo_cdb_offset = fifo8_num_used(&s->cmdfifo);
esp_set_phase(s, STAT_CD);
- s->rregs[ESP_RSTAT] |= STAT_TC;
s->rregs[ESP_RSEQ] = SEQ_CD;
s->rregs[ESP_RINTR] |= INTR_BS;
esp_raise_irq(s);
@@ -952,7 +945,6 @@ void esp_transfer_data(SCSIRequest *req, uint32_t len)
* completion interrupt
*/
s->data_in_ready = true;
- s->rregs[ESP_RSTAT] |= STAT_TC;
s->rregs[ESP_RINTR] |= INTR_BS;
esp_raise_irq(s);
}
@@ -997,7 +989,6 @@ static void handle_ti(ESPState *s)
if (s->dma) {
dmalen = esp_get_tc(s);
trace_esp_handle_ti(dmalen);
- s->rregs[ESP_RSTAT] &= ~STAT_TC;
esp_do_dma(s);
} else {
trace_esp_handle_ti(s->ti_size);
@@ -1152,7 +1143,6 @@ uint64_t esp_reg_read(ESPState *s, uint32_t saddr)
* of the FIFO so switch to status phase
*/
esp_set_phase(s, STAT_ST);
- s->rregs[ESP_RSTAT] |= STAT_TC;
}
}
s->rregs[ESP_FIFO] = esp_fifo_pop(&s->fifo);