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authorPeter Maydell <peter.maydell@linaro.org>2022-12-14 14:27:08 +0000
committerPeter Maydell <peter.maydell@linaro.org>2022-12-15 11:18:19 +0000
commitd2fd931362a693d988e3204ddc8068875dcf8fab (patch)
tree947f56e6d62c096617d01df346ad3113b07736a2 /hw
parent58dff8f7ea7aadbfacf4416c4988ad7f0f88a4c8 (diff)
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target/arm: Allow relevant HCR bits to be written for FEAT_EVT
FEAT_EVT adds five new bits to the HCR_EL2 register: TTLBIS, TTLBOS, TICAB, TOCU and TID4. These allow the guest to enable trapping of various EL1 instructions to EL2. In this commit, add the necessary code to allow the guest to set these bits if the feature is present; because the bit is always zero when the feature isn't present we won't need to use explicit feature checks in the "trap on condition" tests in the following commits. Note that although full implementation of the feature (mandatory from Armv8.5 onward) requires all five trap bits, the ID registers permit a value indicating that only TICAB, TOCU and TID4 are implemented, which might be the case for CPUs between Armv8.2 and Armv8.5. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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