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| author | Nicholas Piggin <npiggin@gmail.com> | 2025-05-12 13:10:28 +1000 |
|---|---|---|
| committer | Cédric Le Goater <clg@redhat.com> | 2025-07-21 08:03:52 +0200 |
| commit | d273abbfba47ef47e331dc22731c7d2a15e95c9a (patch) | |
| tree | 58bcfa3a4391fd455bf2dee49141d566b964029f /hw | |
| parent | 14cbb7bf1245c2d9166be0309c9407845783b281 (diff) | |
| download | qemu-d273abbfba47ef47e331dc22731c7d2a15e95c9a.zip qemu-d273abbfba47ef47e331dc22731c7d2a15e95c9a.tar.gz qemu-d273abbfba47ef47e331dc22731c7d2a15e95c9a.tar.bz2 | |
pnv/xive2: VC_ENDC_WATCH_SPEC regs should read back WATCH_FULL
Firmware expects to read back the WATCH_FULL bit from the VC_ENDC_WATCH_SPEC
register, so don't clear it on read.
Don't bother clearing the reads-as-zero CONFLICT bit because it's masked
at write already.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
Reviewed-by: Michael Kowal <kowal@linux.ibm.com>
Reviewed-by: Caleb Schlossin <calebs@linux.ibm.com>
Tested-by: Gautam Menghani <gautam@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-20-npiggin@gmail.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/intc/pnv_xive2.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c index 9d53537..e15f414 100644 --- a/hw/intc/pnv_xive2.c +++ b/hw/intc/pnv_xive2.c @@ -1329,7 +1329,6 @@ static uint64_t pnv_xive2_ic_vc_read(void *opaque, hwaddr offset, case VC_ENDC_WATCH2_SPEC: case VC_ENDC_WATCH3_SPEC: watch_engine = (offset - VC_ENDC_WATCH0_SPEC) >> 6; - xive->vc_regs[reg] &= ~(VC_ENDC_WATCH_FULL | VC_ENDC_WATCH_CONFLICT); pnv_xive2_endc_cache_watch_release(xive, watch_engine); val = xive->vc_regs[reg]; break; |