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authorStefan Weil <sw@weilnetz.de>2016-03-23 15:59:57 +0100
committerMichael Tokarev <mjt@tls.msk.ru>2016-05-18 15:04:27 +0300
commitcb8d4c8f54b8271f642f02382eec29d468bb1c77 (patch)
tree93a1691d7a5d90ddbb77a3210299089fcede4947 /hw
parentd506dc87b97659f08c65d3bb470b1b7bfd789759 (diff)
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Fix some typos found by codespell
Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Diffstat (limited to 'hw')
-rw-r--r--hw/i2c/imx_i2c.c2
-rw-r--r--hw/net/vmxnet3.c4
-rw-r--r--hw/pci/msi.c2
-rw-r--r--hw/pci/pci_bridge.c2
-rw-r--r--hw/scsi/spapr_vscsi.c2
-rw-r--r--hw/scsi/vmw_pvscsi.c2
-rw-r--r--hw/timer/a9gtimer.c2
-rw-r--r--hw/timer/aspeed_timer.c4
8 files changed, 10 insertions, 10 deletions
diff --git a/hw/i2c/imx_i2c.c b/hw/i2c/imx_i2c.c
index a01e43e..e19d4fa 100644
--- a/hw/i2c/imx_i2c.c
+++ b/hw/i2c/imx_i2c.c
@@ -247,7 +247,7 @@ static void imx_i2c_write(void *opaque, hwaddr offset,
if (s->address == ADDR_RESET) {
if (i2c_start_transfer(s->bus, extract32(s->i2dr_write, 1, 7),
extract32(s->i2dr_write, 0, 1))) {
- /* if non zero is returned, the adress is not valid */
+ /* if non zero is returned, the address is not valid */
s->i2sr |= I2SR_RXAK;
} else {
s->address = s->i2dr_write;
diff --git a/hw/net/vmxnet3.c b/hw/net/vmxnet3.c
index 093a71e..20f26b7 100644
--- a/hw/net/vmxnet3.c
+++ b/hw/net/vmxnet3.c
@@ -37,7 +37,7 @@
#define VMXNET3_MSIX_BAR_SIZE 0x2000
#define MIN_BUF_SIZE 60
-/* Compatability flags for migration */
+/* Compatibility flags for migration */
#define VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS_BIT 0
#define VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS \
(1 << VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS_BIT)
@@ -341,7 +341,7 @@ typedef struct {
uint32_t mcast_list_len;
uint32_t mcast_list_buff_size; /* needed for live migration. */
- /* Compatability flags for migration */
+ /* Compatibility flags for migration */
uint32_t compat_flags;
} VMXNET3State;
diff --git a/hw/pci/msi.c b/hw/pci/msi.c
index e0e64c2..a87ef4d 100644
--- a/hw/pci/msi.c
+++ b/hw/pci/msi.c
@@ -40,7 +40,7 @@
*
* Setting this flag to false will remove MSI/MSI-X capability from all devices.
*
- * It is preferrable for controllers to set this to true (non-broken) even if
+ * It is preferable for controllers to set this to true (non-broken) even if
* they do not actually support MSI/MSI-X: guests normally probe the controller
* type and do not attempt to enable MSI/MSI-X with interrupt controllers not
* supporting such, so removing the capability is not required, and
diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
index 3cf30bd..5118ef4 100644
--- a/hw/pci/pci_bridge.c
+++ b/hw/pci/pci_bridge.c
@@ -116,7 +116,7 @@ pcibus_t pci_bridge_get_base(const PCIDevice *bridge, uint8_t type)
return base;
}
-/* accessor funciton to get bridge filtering limit */
+/* accessor function to get bridge filtering limit */
pcibus_t pci_bridge_get_limit(const PCIDevice *bridge, uint8_t type)
{
pcibus_t limit;
diff --git a/hw/scsi/spapr_vscsi.c b/hw/scsi/spapr_vscsi.c
index b00edf7..8fbd50f 100644
--- a/hw/scsi/spapr_vscsi.c
+++ b/hw/scsi/spapr_vscsi.c
@@ -698,7 +698,7 @@ static void vscsi_inquiry_no_target(VSCSIState *s, vscsi_req *req)
uint8_t resp_data[36];
int rc, len, alen;
- /* We dont do EVPD. Also check that page_code is 0 */
+ /* We don't do EVPD. Also check that page_code is 0 */
if ((cdb[1] & 0x01) || cdb[2] != 0) {
/* Send INVALID FIELD IN CDB */
vscsi_makeup_sense(s, req, ILLEGAL_REQUEST, 0x24, 0);
diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c
index e690b4e..f67b5bf 100644
--- a/hw/scsi/vmw_pvscsi.c
+++ b/hw/scsi/vmw_pvscsi.c
@@ -63,7 +63,7 @@ typedef struct PVSCSIClass {
#define PVSCSI_DEVICE_GET_CLASS(obj) \
OBJECT_GET_CLASS(PVSCSIClass, (obj), TYPE_PVSCSI)
-/* Compatability flags for migration */
+/* Compatibility flags for migration */
#define PVSCSI_COMPAT_OLD_PCI_CONFIGURATION_BIT 0
#define PVSCSI_COMPAT_OLD_PCI_CONFIGURATION \
(1 << PVSCSI_COMPAT_OLD_PCI_CONFIGURATION_BIT)
diff --git a/hw/timer/a9gtimer.c b/hw/timer/a9gtimer.c
index afe577c..772f85f 100644
--- a/hw/timer/a9gtimer.c
+++ b/hw/timer/a9gtimer.c
@@ -184,7 +184,7 @@ static void a9_gtimer_write(void *opaque, hwaddr addr, uint64_t value,
case R_COUNTER_LO:
/*
* Keep it simple - ARM docco explicitly says to disable timer before
- * modding it, so dont bother trying to do all the difficult on the fly
+ * modding it, so don't bother trying to do all the difficult on the fly
* timer modifications - (if they even work in real hardware??).
*/
if (s->control & R_CONTROL_TIMER_ENABLE) {
diff --git a/hw/timer/aspeed_timer.c b/hw/timer/aspeed_timer.c
index 51e8303..ebec359 100644
--- a/hw/timer/aspeed_timer.c
+++ b/hw/timer/aspeed_timer.c
@@ -187,7 +187,7 @@ static void aspeed_timer_set_value(AspeedTimerCtrlState *s, int timer, int reg,
}
/* Control register operations are broken out into helpers that can be
- * explictly called on aspeed_timer_reset(), but also from
+ * explicitly called on aspeed_timer_reset(), but also from
* aspeed_timer_ctrl_op().
*/
@@ -380,7 +380,7 @@ static void aspeed_timer_reset(DeviceState *dev)
for (i = 0; i < ASPEED_TIMER_NR_TIMERS; i++) {
AspeedTimer *t = &s->timers[i];
- /* Explictly call helpers to avoid any conditional behaviour through
+ /* Explicitly call helpers to avoid any conditional behaviour through
* aspeed_timer_set_ctrl().
*/
aspeed_timer_ctrl_enable(t, false);