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| author | Michael Tokarev <mjt@tls.msk.ru> | 2022-11-05 14:53:29 +0300 |
|---|---|---|
| committer | Laurent Vivier <laurent@vivier.eu> | 2023-01-17 10:02:37 +0100 |
| commit | b93b3cb1bb72f313d8c33791e0a82a25da780cf0 (patch) | |
| tree | 5f4f3ca8a9e281c37a7bbf0312dae858067138dc /hw | |
| parent | f99ad11cd193f21d8740ca836e2d84315171aefd (diff) | |
| download | qemu-b93b3cb1bb72f313d8c33791e0a82a25da780cf0.zip qemu-b93b3cb1bb72f313d8c33791e0a82a25da780cf0.tar.gz qemu-b93b3cb1bb72f313d8c33791e0a82a25da780cf0.tar.bz2 | |
hw/ssi/sifive_spi.c: spelling: reigster
Fixes: 0694dabe9763847f3010b54ab3ec7d367d2f0ff0
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Message-Id: <20221105115329.306527-1-mjt@msgid.tls.msk.ru>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/ssi/sifive_spi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/ssi/sifive_spi.c b/hw/ssi/sifive_spi.c index 03540cf..1b4a401 100644 --- a/hw/ssi/sifive_spi.c +++ b/hw/ssi/sifive_spi.c @@ -267,7 +267,7 @@ static void sifive_spi_write(void *opaque, hwaddr addr, case R_RXDATA: case R_IP: qemu_log_mask(LOG_GUEST_ERROR, - "%s: invalid write to read-only reigster 0x%" + "%s: invalid write to read-only register 0x%" HWADDR_PRIx " with 0x%x\n", __func__, addr << 2, value); break; |