diff options
| author | Peter Xu <peterx@redhat.com> | 2016-07-14 13:56:15 +0800 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2016-07-20 19:30:27 +0300 |
| commit | b79104722fc77974a222929f5590c3bea2941dd7 (patch) | |
| tree | 42ff52b043533460b656ca614f7104c52ba49b4f /hw | |
| parent | d46114f9ec40e714ae3fa17c446890d369c32812 (diff) | |
| download | qemu-b79104722fc77974a222929f5590c3bea2941dd7.zip qemu-b79104722fc77974a222929f5590c3bea2941dd7.tar.gz qemu-b79104722fc77974a222929f5590c3bea2941dd7.tar.bz2 | |
intel_iommu: allow queued invalidation for IR
Queued invalidation is required for IR. This patch add basic support for
interrupt cache invalidate requests. Since we currently have no IR cache
implemented yet, we can just skip all interrupt cache invalidation
requests for now.
Signed-off-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/i386/intel_iommu.c | 9 | ||||
| -rw-r--r-- | hw/i386/intel_iommu_internal.h | 2 |
2 files changed, 11 insertions, 0 deletions
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 3ee5782..26e322a 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -1404,6 +1404,15 @@ static bool vtd_process_inv_desc(IntelIOMMUState *s) } break; + case VTD_INV_DESC_IEC: + VTD_DPRINTF(INV, "Interrupt Entry Cache Invalidation " + "not implemented yet"); + /* + * Since currently we do not cache interrupt entries, we can + * just mark this descriptor as "good" and move on. + */ + break; + default: VTD_DPRINTF(GENERAL, "error: unkonw Invalidation Descriptor type " "hi 0x%"PRIx64 " lo 0x%"PRIx64 " type %"PRIu8, diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h index e5f514c..b648e69 100644 --- a/hw/i386/intel_iommu_internal.h +++ b/hw/i386/intel_iommu_internal.h @@ -286,6 +286,8 @@ typedef struct VTDInvDesc VTDInvDesc; #define VTD_INV_DESC_TYPE 0xf #define VTD_INV_DESC_CC 0x1 /* Context-cache Invalidate Desc */ #define VTD_INV_DESC_IOTLB 0x2 +#define VTD_INV_DESC_IEC 0x4 /* Interrupt Entry Cache + Invalidate Descriptor */ #define VTD_INV_DESC_WAIT 0x5 /* Invalidation Wait Descriptor */ #define VTD_INV_DESC_NONE 0 /* Not an Invalidate Descriptor */ |