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author | Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> | 2017-02-21 10:09:04 +0100 |
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committer | Cornelia Huck <cornelia.huck@de.ibm.com> | 2017-02-24 10:15:18 +0100 |
commit | 9f94f84ce7df633142953806cc4c102765cabc0e (patch) | |
tree | dc24fbae809cb99dfe30e0b2d92fc42506f751e1 /hw | |
parent | f738f296eaaed719508207ba36b995ba73fe27db (diff) | |
download | qemu-9f94f84ce7df633142953806cc4c102765cabc0e.zip qemu-9f94f84ce7df633142953806cc4c102765cabc0e.tar.gz qemu-9f94f84ce7df633142953806cc4c102765cabc0e.tar.bz2 |
s390x/css: handle format-0 TIC CCW correctly
For TIC CCW, bit positions 8-32 of the format-1 CCW must contain zeros;
otherwise, a program-check condition is generated. For format-0 TIC CCWs,
bits 32-63 are ignored.
To convert TIC from format-0 CCW to format-1 CCW correctly, let's clear
bits 8-32 to guarantee compatibility.
Reviewed-by: Pierre Morel <pmorel@linux.vnet.ibm.com>
Signed-off-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/s390x/css.c | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/hw/s390x/css.c b/hw/s390x/css.c index 0f2580d..e32b2a4 100644 --- a/hw/s390x/css.c +++ b/hw/s390x/css.c @@ -368,13 +368,16 @@ static CCW1 copy_ccw_from_guest(hwaddr addr, bool fmt1) ret.cda = be32_to_cpu(tmp1.cda); } else { cpu_physical_memory_read(addr, &tmp0, sizeof(tmp0)); - ret.cmd_code = tmp0.cmd_code; - ret.flags = tmp0.flags; - ret.count = be16_to_cpu(tmp0.count); - ret.cda = be16_to_cpu(tmp0.cda1) | (tmp0.cda0 << 16); - if ((ret.cmd_code & 0x0f) == CCW_CMD_TIC) { - ret.cmd_code &= 0x0f; + if ((tmp0.cmd_code & 0x0f) == CCW_CMD_TIC) { + ret.cmd_code = CCW_CMD_TIC; + ret.flags = 0; + ret.count = 0; + } else { + ret.cmd_code = tmp0.cmd_code; + ret.flags = tmp0.flags; + ret.count = be16_to_cpu(tmp0.count); } + ret.cda = be16_to_cpu(tmp0.cda1) | (tmp0.cda0 << 16); } return ret; } |