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authorDaniel Henrique Barboza <dbarboza@ventanamicro.com>2022-12-29 17:18:26 +0800
committerAlistair Francis <alistair.francis@wdc.com>2023-01-20 10:14:13 +1000
commit9d3f7108bc43e93ceef7faa27c87eea8295c33ed (patch)
treefce516973e7d59e65e8be4f0b85df8c9d8f07259 /hw
parent808faef7cd38222ac02e5876e5170c7d00982876 (diff)
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hw/riscv/boot.c: introduce riscv_default_firmware_name()
Some boards are duplicating the 'riscv_find_and_load_firmware' call because the 32 and 64 bits images have different names. Create a function to handle this detail instead of hardcoding it in the boards. Ideally we would bake this logic inside riscv_find_and_load_firmware(), or even create a riscv_load_default_firmware(), but at this moment we cannot infer whether the machine is running 32 or 64 bits without accessing RISCVHartArrayState, which in turn can't be accessed via the common code from boot.c. In the end we would exchange 'firmware_name' for a flag with riscv_is_32bit(), which isn't much better than what we already have today. Cc: Palmer Dabbelt <palmer@dabbelt.com> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Signed-off-by: Bin Meng <bmeng@tinylab.org> Message-Id: <20221221182300.307900-6-dbarboza@ventanamicro.com> Message-Id: <20221229091828.1945072-11-bmeng@tinylab.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/riscv/boot.c9
-rw-r--r--hw/riscv/sifive_u.c11
-rw-r--r--hw/riscv/spike.c14
-rw-r--r--hw/riscv/virt.c10
4 files changed, 21 insertions, 23 deletions
diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c
index 7361d5c..e1a544b 100644
--- a/hw/riscv/boot.c
+++ b/hw/riscv/boot.c
@@ -75,6 +75,15 @@ target_ulong riscv_calc_kernel_start_addr(RISCVHartArrayState *harts,
}
}
+const char *riscv_default_firmware_name(RISCVHartArrayState *harts)
+{
+ if (riscv_is_32bit(harts)) {
+ return RISCV32_BIOS_BIN;
+ }
+
+ return RISCV64_BIOS_BIN;
+}
+
static char *riscv_find_firmware(const char *firmware_filename)
{
char *filename;
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index b40a476..a58ddb3 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -533,6 +533,7 @@ static void sifive_u_machine_init(MachineState *machine)
MemoryRegion *flash0 = g_new(MemoryRegion, 1);
target_ulong start_addr = memmap[SIFIVE_U_DEV_DRAM].base;
target_ulong firmware_end_addr, kernel_start_addr;
+ const char *firmware_name;
uint32_t start_addr_hi32 = 0x00000000;
int i;
uint32_t fdt_load_addr;
@@ -595,13 +596,9 @@ static void sifive_u_machine_init(MachineState *machine)
break;
}
- if (riscv_is_32bit(&s->soc.u_cpus)) {
- firmware_end_addr = riscv_find_and_load_firmware(machine,
- RISCV32_BIOS_BIN, start_addr, NULL);
- } else {
- firmware_end_addr = riscv_find_and_load_firmware(machine,
- RISCV64_BIOS_BIN, start_addr, NULL);
- }
+ firmware_name = riscv_default_firmware_name(&s->soc.u_cpus);
+ firmware_end_addr = riscv_find_and_load_firmware(machine, firmware_name,
+ start_addr, NULL);
if (machine->kernel_filename) {
kernel_start_addr = riscv_calc_kernel_start_addr(&s->soc.u_cpus,
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index df9f070..3c8a8de 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -190,6 +190,7 @@ static void spike_board_init(MachineState *machine)
MemoryRegion *system_memory = get_system_memory();
MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
target_ulong firmware_end_addr, kernel_start_addr;
+ const char *firmware_name;
uint32_t fdt_load_addr;
uint64_t kernel_entry;
char *soc_name;
@@ -255,15 +256,10 @@ static void spike_board_init(MachineState *machine)
memory_region_add_subregion(system_memory, memmap[SPIKE_MROM].base,
mask_rom);
- if (riscv_is_32bit(&s->soc[0])) {
- firmware_end_addr = riscv_find_and_load_firmware(machine,
- RISCV32_BIOS_BIN, memmap[SPIKE_DRAM].base,
- htif_symbol_callback);
- } else {
- firmware_end_addr = riscv_find_and_load_firmware(machine,
- RISCV64_BIOS_BIN, memmap[SPIKE_DRAM].base,
- htif_symbol_callback);
- }
+ firmware_name = riscv_default_firmware_name(&s->soc[0]);
+ firmware_end_addr = riscv_find_and_load_firmware(machine, firmware_name,
+ memmap[SPIKE_DRAM].base,
+ htif_symbol_callback);
/* Load kernel */
if (machine->kernel_filename) {
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 94ff2a1..408f7a2 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -1237,6 +1237,7 @@ static void virt_machine_done(Notifier *notifier, void *data)
MachineState *machine = MACHINE(s);
target_ulong start_addr = memmap[VIRT_DRAM].base;
target_ulong firmware_end_addr, kernel_start_addr;
+ const char *firmware_name = riscv_default_firmware_name(&s->soc[0]);
uint32_t fdt_load_addr;
uint64_t kernel_entry;
@@ -1256,13 +1257,8 @@ static void virt_machine_done(Notifier *notifier, void *data)
}
}
- if (riscv_is_32bit(&s->soc[0])) {
- firmware_end_addr = riscv_find_and_load_firmware(machine,
- RISCV32_BIOS_BIN, start_addr, NULL);
- } else {
- firmware_end_addr = riscv_find_and_load_firmware(machine,
- RISCV64_BIOS_BIN, start_addr, NULL);
- }
+ firmware_end_addr = riscv_find_and_load_firmware(machine, firmware_name,
+ start_addr, NULL);
/*
* Init fw_cfg. Must be done before riscv_load_fdt, otherwise the device