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authorPeter Maydell <peter.maydell@linaro.org>2020-05-04 13:37:17 +0100
committerPeter Maydell <peter.maydell@linaro.org>2020-05-04 13:37:17 +0100
commit9af638cc1f665712522608c5d6b8c03d8fa67666 (patch)
treeb04f0d713a642e29f08f66b50b9592ee7529b8fe /hw
parent2ef486e76d64436be90f7359a3071fb2a56ce835 (diff)
parent9aefc6cf9b73f66062d2f914a0136756e7a28211 (diff)
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200504' into staging
target-arm queue: * Start of conversion of Neon insns to decodetree * versal board: support SD and RTC * Implement ARMv8.2-TTS2UXN * Make VQDMULL undefined when U=1 * Some minor code cleanups # gpg: Signature made Mon 04 May 2020 13:32:08 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20200504: (39 commits) target/arm: Move gen_ function typedefs to translate.h target/arm: Convert Neon 3-reg-same VMUL, VMLA, VMLS, VSHL to decodetree target/arm: Convert Neon 3-reg-same VQADD/VQSUB to decodetree target/arm: Convert Neon 3-reg-same comparisons to decodetree target/arm: Convert Neon 3-reg-same VMAX/VMIN to decodetree target/arm: Convert Neon 3-reg-same logic ops to decodetree target/arm: Convert Neon 3-reg-same VADD/VSUB to decodetree target/arm: Convert Neon 'load/store single structure' to decodetree target/arm: Convert Neon 'load single structure to all lanes' to decodetree target/arm: Convert Neon load/store multiple structures to decodetree target/arm: Convert VFM[AS]L (scalar) to decodetree target/arm: Convert V[US]DOT (scalar) to decodetree target/arm: Convert VCMLA (scalar) to decodetree target/arm: Convert VFM[AS]L (vector) to decodetree target/arm: Convert V[US]DOT (vector) to decodetree target/arm: Convert VCADD (vector) to decodetree target/arm: Convert VCMLA (vector) to decodetree target/arm: Add stubs for AArch32 Neon decodetree target/arm: Don't allow Thumb Neon insns without FEATURE_NEON target/arm/translate-vfp.inc.c: Remove duplicate simd_r32 check ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r--hw/arm/mps2-tz.c2
-rw-r--r--hw/arm/xlnx-versal-virt.c74
-rw-r--r--hw/arm/xlnx-versal.c115
3 files changed, 151 insertions, 40 deletions
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index a8dea7d..2c43041 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -395,7 +395,7 @@ static void mps2tz_common_init(MachineState *machine)
exit(EXIT_FAILURE);
}
- sysbus_init_child_obj(OBJECT(machine), "iotkit", &mms->iotkit,
+ sysbus_init_child_obj(OBJECT(machine), TYPE_IOTKIT, &mms->iotkit,
sizeof(mms->iotkit), mmc->armsse_type);
iotkitdev = DEVICE(&mms->iotkit);
object_property_set_link(OBJECT(&mms->iotkit), OBJECT(system_memory),
diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
index 878a275..7e749e1 100644
--- a/hw/arm/xlnx-versal-virt.c
+++ b/hw/arm/xlnx-versal-virt.c
@@ -20,6 +20,7 @@
#include "hw/arm/sysbus-fdt.h"
#include "hw/arm/fdt.h"
#include "cpu.h"
+#include "hw/qdev-properties.h"
#include "hw/arm/xlnx-versal.h"
#define TYPE_XLNX_VERSAL_VIRT_MACHINE MACHINE_TYPE_NAME("xlnx-versal-virt")
@@ -256,6 +257,53 @@ static void fdt_add_zdma_nodes(VersalVirt *s)
}
}
+static void fdt_add_sd_nodes(VersalVirt *s)
+{
+ const char clocknames[] = "clk_xin\0clk_ahb";
+ const char compat[] = "arasan,sdhci-8.9a";
+ int i;
+
+ for (i = ARRAY_SIZE(s->soc.pmc.iou.sd) - 1; i >= 0; i--) {
+ uint64_t addr = MM_PMC_SD0 + MM_PMC_SD0_SIZE * i;
+ char *name = g_strdup_printf("/sdhci@%" PRIx64, addr);
+
+ qemu_fdt_add_subnode(s->fdt, name);
+
+ qemu_fdt_setprop_cells(s->fdt, name, "clocks",
+ s->phandle.clk_25Mhz, s->phandle.clk_25Mhz);
+ qemu_fdt_setprop(s->fdt, name, "clock-names",
+ clocknames, sizeof(clocknames));
+ qemu_fdt_setprop_cells(s->fdt, name, "interrupts",
+ GIC_FDT_IRQ_TYPE_SPI, VERSAL_SD0_IRQ_0 + i * 2,
+ GIC_FDT_IRQ_FLAGS_LEVEL_HI);
+ qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
+ 2, addr, 2, MM_PMC_SD0_SIZE);
+ qemu_fdt_setprop(s->fdt, name, "compatible", compat, sizeof(compat));
+ g_free(name);
+ }
+}
+
+static void fdt_add_rtc_node(VersalVirt *s)
+{
+ const char compat[] = "xlnx,zynqmp-rtc";
+ const char interrupt_names[] = "alarm\0sec";
+ char *name = g_strdup_printf("/rtc@%x", MM_PMC_RTC);
+
+ qemu_fdt_add_subnode(s->fdt, name);
+
+ qemu_fdt_setprop_cells(s->fdt, name, "interrupts",
+ GIC_FDT_IRQ_TYPE_SPI, VERSAL_RTC_ALARM_IRQ,
+ GIC_FDT_IRQ_FLAGS_LEVEL_HI,
+ GIC_FDT_IRQ_TYPE_SPI, VERSAL_RTC_SECONDS_IRQ,
+ GIC_FDT_IRQ_FLAGS_LEVEL_HI);
+ qemu_fdt_setprop(s->fdt, name, "interrupt-names",
+ interrupt_names, sizeof(interrupt_names));
+ qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
+ 2, MM_PMC_RTC, 2, MM_PMC_RTC_SIZE);
+ qemu_fdt_setprop(s->fdt, name, "compatible", compat, sizeof(compat));
+ g_free(name);
+}
+
static void fdt_nop_memory_nodes(void *fdt, Error **errp)
{
Error *err = NULL;
@@ -411,10 +459,23 @@ static void create_virtio_regions(VersalVirt *s)
}
}
+static void sd_plugin_card(SDHCIState *sd, DriveInfo *di)
+{
+ BlockBackend *blk = di ? blk_by_legacy_dinfo(di) : NULL;
+ DeviceState *card;
+
+ card = qdev_create(qdev_get_child_bus(DEVICE(sd), "sd-bus"), TYPE_SD_CARD);
+ object_property_add_child(OBJECT(sd), "card[*]", OBJECT(card),
+ &error_fatal);
+ qdev_prop_set_drive(card, "drive", blk, &error_fatal);
+ object_property_set_bool(OBJECT(card), true, "realized", &error_fatal);
+}
+
static void versal_virt_init(MachineState *machine)
{
VersalVirt *s = XLNX_VERSAL_VIRT_MACHINE(machine);
int psci_conduit = QEMU_PSCI_CONDUIT_DISABLED;
+ int i;
/*
* If the user provides an Operating System to be loaded, we expect them
@@ -440,7 +501,7 @@ static void versal_virt_init(MachineState *machine)
psci_conduit = QEMU_PSCI_CONDUIT_SMC;
}
- sysbus_init_child_obj(OBJECT(machine), "xlnx-ve", &s->soc,
+ sysbus_init_child_obj(OBJECT(machine), "xlnx-versal", &s->soc,
sizeof(s->soc), TYPE_XLNX_VERSAL);
object_property_set_link(OBJECT(&s->soc), OBJECT(machine->ram),
"ddr", &error_abort);
@@ -455,6 +516,8 @@ static void versal_virt_init(MachineState *machine)
fdt_add_gic_nodes(s);
fdt_add_timer_nodes(s);
fdt_add_zdma_nodes(s);
+ fdt_add_sd_nodes(s);
+ fdt_add_rtc_node(s);
fdt_add_cpu_nodes(s, psci_conduit);
fdt_add_clk_node(s, "/clk125", 125000000, s->phandle.clk_125Mhz);
fdt_add_clk_node(s, "/clk25", 25000000, s->phandle.clk_25Mhz);
@@ -464,14 +527,19 @@ static void versal_virt_init(MachineState *machine)
memory_region_add_subregion_overlap(get_system_memory(),
0, &s->soc.fpd.apu.mr, 0);
+ /* Plugin SD cards. */
+ for (i = 0; i < ARRAY_SIZE(s->soc.pmc.iou.sd); i++) {
+ sd_plugin_card(&s->soc.pmc.iou.sd[i], drive_get_next(IF_SD));
+ }
+
s->binfo.ram_size = machine->ram_size;
s->binfo.loader_start = 0x0;
s->binfo.get_dtb = versal_virt_get_dtb;
s->binfo.modify_dtb = versal_virt_modify_dtb;
if (machine->kernel_filename) {
- arm_load_kernel(s->soc.fpd.apu.cpu[0], machine, &s->binfo);
+ arm_load_kernel(&s->soc.fpd.apu.cpu[0], machine, &s->binfo);
} else {
- AddressSpace *as = arm_boot_address_space(s->soc.fpd.apu.cpu[0],
+ AddressSpace *as = arm_boot_address_space(&s->soc.fpd.apu.cpu[0],
&s->binfo);
/* Some boot-loaders (e.g u-boot) don't like blobs at address 0 (NULL).
* Offset things by 4K. */
diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
index 94460f2..321171b 100644
--- a/hw/arm/xlnx-versal.c
+++ b/hw/arm/xlnx-versal.c
@@ -20,9 +20,7 @@
#include "hw/arm/boot.h"
#include "kvm_arm.h"
#include "hw/misc/unimp.h"
-#include "hw/intc/arm_gicv3_common.h"
#include "hw/arm/xlnx-versal.h"
-#include "hw/char/pl011.h"
#define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72")
#define GEM_REVISION 0x40070106
@@ -33,23 +31,15 @@ static void versal_create_apu_cpus(Versal *s)
for (i = 0; i < ARRAY_SIZE(s->fpd.apu.cpu); i++) {
Object *obj;
- char *name;
-
- obj = object_new(XLNX_VERSAL_ACPU_TYPE);
- if (!obj) {
- /* Secondary CPUs start in PSCI powered-down state */
- error_report("Unable to create apu.cpu[%d] of type %s",
- i, XLNX_VERSAL_ACPU_TYPE);
- exit(EXIT_FAILURE);
- }
-
- name = g_strdup_printf("apu-cpu[%d]", i);
- object_property_add_child(OBJECT(s), name, obj, &error_fatal);
- g_free(name);
+ object_initialize_child(OBJECT(s), "apu-cpu[*]",
+ &s->fpd.apu.cpu[i], sizeof(s->fpd.apu.cpu[i]),
+ XLNX_VERSAL_ACPU_TYPE, &error_abort, NULL);
+ obj = OBJECT(&s->fpd.apu.cpu[i]);
object_property_set_int(obj, s->cfg.psci_conduit,
"psci-conduit", &error_abort);
if (i) {
+ /* Secondary CPUs start in PSCI powered-down state */
object_property_set_bool(obj, true,
"start-powered-off", &error_abort);
}
@@ -59,7 +49,6 @@ static void versal_create_apu_cpus(Versal *s)
object_property_set_link(obj, OBJECT(&s->fpd.apu.mr), "memory",
&error_abort);
object_property_set_bool(obj, true, "realized", &error_fatal);
- s->fpd.apu.cpu[i] = ARM_CPU(obj);
}
}
@@ -97,7 +86,7 @@ static void versal_create_apu_gic(Versal *s, qemu_irq *pic)
}
for (i = 0; i < nr_apu_cpus; i++) {
- DeviceState *cpudev = DEVICE(s->fpd.apu.cpu[i]);
+ DeviceState *cpudev = DEVICE(&s->fpd.apu.cpu[i]);
int ppibase = XLNX_VERSAL_NR_IRQS + i * GIC_INTERNAL + GIC_NR_SGIS;
qemu_irq maint_irq;
int ti;
@@ -145,16 +134,17 @@ static void versal_create_uarts(Versal *s, qemu_irq *pic)
DeviceState *dev;
MemoryRegion *mr;
- dev = qdev_create(NULL, TYPE_PL011);
- s->lpd.iou.uart[i] = SYS_BUS_DEVICE(dev);
+ sysbus_init_child_obj(OBJECT(s), name,
+ &s->lpd.iou.uart[i], sizeof(s->lpd.iou.uart[i]),
+ TYPE_PL011);
+ dev = DEVICE(&s->lpd.iou.uart[i]);
qdev_prop_set_chr(dev, "chardev", serial_hd(i));
- object_property_add_child(OBJECT(s), name, OBJECT(dev), &error_fatal);
qdev_init_nofail(dev);
- mr = sysbus_mmio_get_region(s->lpd.iou.uart[i], 0);
+ mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
memory_region_add_subregion(&s->mr_ps, addrs[i], mr);
- sysbus_connect_irq(s->lpd.iou.uart[i], 0, pic[irqs[i]]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[irqs[i]]);
g_free(name);
}
}
@@ -171,25 +161,26 @@ static void versal_create_gems(Versal *s, qemu_irq *pic)
DeviceState *dev;
MemoryRegion *mr;
- dev = qdev_create(NULL, "cadence_gem");
- s->lpd.iou.gem[i] = SYS_BUS_DEVICE(dev);
- object_property_add_child(OBJECT(s), name, OBJECT(dev), &error_fatal);
+ sysbus_init_child_obj(OBJECT(s), name,
+ &s->lpd.iou.gem[i], sizeof(s->lpd.iou.gem[i]),
+ TYPE_CADENCE_GEM);
+ dev = DEVICE(&s->lpd.iou.gem[i]);
if (nd->used) {
qemu_check_nic_model(nd, "cadence_gem");
qdev_set_nic_properties(dev, nd);
}
- object_property_set_int(OBJECT(s->lpd.iou.gem[i]),
+ object_property_set_int(OBJECT(dev),
2, "num-priority-queues",
&error_abort);
- object_property_set_link(OBJECT(s->lpd.iou.gem[i]),
+ object_property_set_link(OBJECT(dev),
OBJECT(&s->mr_ps), "dma",
&error_abort);
qdev_init_nofail(dev);
- mr = sysbus_mmio_get_region(s->lpd.iou.gem[i], 0);
+ mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
memory_region_add_subregion(&s->mr_ps, addrs[i], mr);
- sysbus_connect_irq(s->lpd.iou.gem[i], 0, pic[irqs[i]]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[irqs[i]]);
g_free(name);
}
}
@@ -203,22 +194,72 @@ static void versal_create_admas(Versal *s, qemu_irq *pic)
DeviceState *dev;
MemoryRegion *mr;
- dev = qdev_create(NULL, "xlnx.zdma");
- s->lpd.iou.adma[i] = SYS_BUS_DEVICE(dev);
- object_property_set_int(OBJECT(s->lpd.iou.adma[i]), 128, "bus-width",
- &error_abort);
- object_property_add_child(OBJECT(s), name, OBJECT(dev), &error_fatal);
+ sysbus_init_child_obj(OBJECT(s), name,
+ &s->lpd.iou.adma[i], sizeof(s->lpd.iou.adma[i]),
+ TYPE_XLNX_ZDMA);
+ dev = DEVICE(&s->lpd.iou.adma[i]);
+ object_property_set_int(OBJECT(dev), 128, "bus-width", &error_abort);
qdev_init_nofail(dev);
- mr = sysbus_mmio_get_region(s->lpd.iou.adma[i], 0);
+ mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
memory_region_add_subregion(&s->mr_ps,
MM_ADMA_CH0 + i * MM_ADMA_CH0_SIZE, mr);
- sysbus_connect_irq(s->lpd.iou.adma[i], 0, pic[VERSAL_ADMA_IRQ_0 + i]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[VERSAL_ADMA_IRQ_0 + i]);
g_free(name);
}
}
+#define SDHCI_CAPABILITIES 0x280737ec6481 /* Same as on ZynqMP. */
+static void versal_create_sds(Versal *s, qemu_irq *pic)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(s->pmc.iou.sd); i++) {
+ DeviceState *dev;
+ MemoryRegion *mr;
+
+ sysbus_init_child_obj(OBJECT(s), "sd[*]",
+ &s->pmc.iou.sd[i], sizeof(s->pmc.iou.sd[i]),
+ TYPE_SYSBUS_SDHCI);
+ dev = DEVICE(&s->pmc.iou.sd[i]);
+
+ object_property_set_uint(OBJECT(dev),
+ 3, "sd-spec-version", &error_fatal);
+ object_property_set_uint(OBJECT(dev), SDHCI_CAPABILITIES, "capareg",
+ &error_fatal);
+ object_property_set_uint(OBJECT(dev), UHS_I, "uhs", &error_fatal);
+ qdev_init_nofail(dev);
+
+ mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
+ memory_region_add_subregion(&s->mr_ps,
+ MM_PMC_SD0 + i * MM_PMC_SD0_SIZE, mr);
+
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
+ pic[VERSAL_SD0_IRQ_0 + i * 2]);
+ }
+}
+
+static void versal_create_rtc(Versal *s, qemu_irq *pic)
+{
+ SysBusDevice *sbd;
+ MemoryRegion *mr;
+
+ sysbus_init_child_obj(OBJECT(s), "rtc", &s->pmc.rtc, sizeof(s->pmc.rtc),
+ TYPE_XLNX_ZYNQMP_RTC);
+ sbd = SYS_BUS_DEVICE(&s->pmc.rtc);
+ qdev_init_nofail(DEVICE(sbd));
+
+ mr = sysbus_mmio_get_region(sbd, 0);
+ memory_region_add_subregion(&s->mr_ps, MM_PMC_RTC, mr);
+
+ /*
+ * TODO: Connect the ALARM and SECONDS interrupts once our RTC model
+ * supports them.
+ */
+ sysbus_connect_irq(sbd, 1, pic[VERSAL_RTC_APB_ERR_IRQ]);
+}
+
/* This takes the board allocated linear DDR memory and creates aliases
* for each split DDR range/aperture on the Versal address map.
*/
@@ -301,6 +342,8 @@ static void versal_realize(DeviceState *dev, Error **errp)
versal_create_uarts(s, pic);
versal_create_gems(s, pic);
versal_create_admas(s, pic);
+ versal_create_sds(s, pic);
+ versal_create_rtc(s, pic);
versal_map_ddr(s);
versal_unimp(s);