diff options
author | Cédric Le Goater <clg@kaod.org> | 2019-12-05 19:44:53 +0100 |
---|---|---|
committer | David Gibson <david@gibson.dropbear.id.au> | 2019-12-17 10:39:48 +1100 |
commit | 8b50ce850538223b8dd2c2f4ed8a819d3c60bfc1 (patch) | |
tree | 05911ade07950427f819c7fc7456b0103583450b /hw | |
parent | c5412b1d28535f8a2c252c9b62634389b83cae48 (diff) | |
download | qemu-8b50ce850538223b8dd2c2f4ed8a819d3c60bfc1.zip qemu-8b50ce850538223b8dd2c2f4ed8a819d3c60bfc1.tar.gz qemu-8b50ce850538223b8dd2c2f4ed8a819d3c60bfc1.tar.bz2 |
ppc/pnv: add a PSI bridge model for POWER10
The POWER10 PSIHB controller is very similar to the one on POWER9. We
should probably introduce a common PnvPsiXive object.
The ESB page size should be changed to 64k when P10 support is ready.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20191205184454.10722-5-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/ppc/pnv.c | 27 | ||||
-rw-r--r-- | hw/ppc/pnv_psi.c | 25 |
2 files changed, 44 insertions, 8 deletions
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index d99cd72..09263ab 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -647,9 +647,9 @@ static void pnv_ipmi_bt_init(ISABus *bus, IPMIBmc *bmc, uint32_t irq) static void pnv_chip_power10_pic_print_info(PnvChip *chip, Monitor *mon) { - /* - * No interrupt controller yet - */; + Pnv10Chip *chip10 = PNV10_CHIP(chip); + + pnv_psi_pic_print_info(&chip10->psi, mon); } static void pnv_init(MachineState *machine) @@ -1311,16 +1311,17 @@ static void pnv_chip_power9_class_init(ObjectClass *klass, void *data) static void pnv_chip_power10_instance_init(Object *obj) { - /* - * No controllers yet - */ - ; + Pnv10Chip *chip10 = PNV10_CHIP(obj); + + object_initialize_child(obj, "psi", &chip10->psi, sizeof(chip10->psi), + TYPE_PNV10_PSI, &error_abort, NULL); } static void pnv_chip_power10_realize(DeviceState *dev, Error **errp) { PnvChipClass *pcc = PNV_CHIP_GET_CLASS(dev); PnvChip *chip = PNV_CHIP(dev); + Pnv10Chip *chip10 = PNV10_CHIP(dev); Error *local_err = NULL; /* XSCOM bridge is first */ @@ -1336,6 +1337,18 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp) error_propagate(errp, local_err); return; } + + /* Processor Service Interface (PSI) Host Bridge */ + object_property_set_int(OBJECT(&chip10->psi), PNV10_PSIHB_BASE(chip), + "bar", &error_fatal); + object_property_set_bool(OBJECT(&chip10->psi), true, "realized", + &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + pnv_xscom_add_subregion(chip, PNV10_XSCOM_PSIHB_BASE, + &PNV_PSI(&chip10->psi)->xscom_regs); } static void pnv_chip_power10_class_init(ObjectClass *klass, void *data) diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c index e6c266a..5729243 100644 --- a/hw/ppc/pnv_psi.c +++ b/hw/ppc/pnv_psi.c @@ -538,6 +538,7 @@ static void pnv_psi_power8_realize(DeviceState *dev, Error **errp) static const char compat_p8[] = "ibm,power8-psihb-x\0ibm,psihb-x"; static const char compat_p9[] = "ibm,power9-psihb-x\0ibm,psihb-x"; +static const char compat_p10[] = "ibm,power10-psihb-x\0ibm,psihb-x"; static int pnv_psi_dt_xscom(PnvXScomInterface *dev, void *fdt, int xscom_offset) { @@ -557,7 +558,10 @@ static int pnv_psi_dt_xscom(PnvXScomInterface *dev, void *fdt, int xscom_offset) _FDT(fdt_setprop(fdt, offset, "reg", reg, sizeof(reg))); _FDT(fdt_setprop_cell(fdt, offset, "#address-cells", 2)); _FDT(fdt_setprop_cell(fdt, offset, "#size-cells", 1)); - if (ppc->chip_type == PNV_CHIP_POWER9) { + if (ppc->chip_type == PNV_CHIP_POWER10) { + _FDT(fdt_setprop(fdt, offset, "compatible", compat_p10, + sizeof(compat_p10))); + } else if (ppc->chip_type == PNV_CHIP_POWER9) { _FDT(fdt_setprop(fdt, offset, "compatible", compat_p9, sizeof(compat_p9))); } else { @@ -909,6 +913,24 @@ static const TypeInfo pnv_psi_power9_info = { }, }; +static void pnv_psi_power10_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + PnvPsiClass *ppc = PNV_PSI_CLASS(klass); + + dc->desc = "PowerNV PSI Controller POWER10"; + + ppc->chip_type = PNV_CHIP_POWER10; + ppc->xscom_pcba = PNV10_XSCOM_PSIHB_BASE; + ppc->xscom_size = PNV10_XSCOM_PSIHB_SIZE; +} + +static const TypeInfo pnv_psi_power10_info = { + .name = TYPE_PNV10_PSI, + .parent = TYPE_PNV9_PSI, + .class_init = pnv_psi_power10_class_init, +}; + static void pnv_psi_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); @@ -938,6 +960,7 @@ static void pnv_psi_register_types(void) type_register_static(&pnv_psi_info); type_register_static(&pnv_psi_power8_info); type_register_static(&pnv_psi_power9_info); + type_register_static(&pnv_psi_power10_info); } type_init(pnv_psi_register_types); |