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| author | Richard Henderson <richard.henderson@linaro.org> | 2024-12-13 15:25:18 +0000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-12-15 12:54:47 -0600 |
| commit | 804467e148a254a503834a2c712cad827f6f4b25 (patch) | |
| tree | 36f955f79a4e51b0e639aa8f4f819c5539fffeaa /hw | |
| parent | f5ca2d6233c88464bcf2616bc8697247cb57bcc5 (diff) | |
| download | qemu-804467e148a254a503834a2c712cad827f6f4b25.zip qemu-804467e148a254a503834a2c712cad827f6f4b25.tar.gz qemu-804467e148a254a503834a2c712cad827f6f4b25.tar.bz2 | |
hw/cpu: Constify all Property
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/cpu/a15mpcore.c | 2 | ||||
| -rw-r--r-- | hw/cpu/a9mpcore.c | 2 | ||||
| -rw-r--r-- | hw/cpu/arm11mpcore.c | 2 | ||||
| -rw-r--r-- | hw/cpu/cluster.c | 2 | ||||
| -rw-r--r-- | hw/cpu/realview_mpcore.c | 2 |
5 files changed, 5 insertions, 5 deletions
diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c index 967d8d3..5346b8b 100644 --- a/hw/cpu/a15mpcore.c +++ b/hw/cpu/a15mpcore.c @@ -144,7 +144,7 @@ static void a15mp_priv_realize(DeviceState *dev, Error **errp) } } -static Property a15mp_priv_properties[] = { +static const Property a15mp_priv_properties[] = { DEFINE_PROP_UINT32("num-cpu", A15MPPrivState, num_cpu, 1), /* The Cortex-A15MP may have anything from 0 to 224 external interrupt * IRQ lines (with another 32 internal). We default to 128+32, which diff --git a/hw/cpu/a9mpcore.c b/hw/cpu/a9mpcore.c index c30ef72..c3fdfb9 100644 --- a/hw/cpu/a9mpcore.c +++ b/hw/cpu/a9mpcore.c @@ -158,7 +158,7 @@ static void a9mp_priv_realize(DeviceState *dev, Error **errp) } } -static Property a9mp_priv_properties[] = { +static const Property a9mp_priv_properties[] = { DEFINE_PROP_UINT32("num-cpu", A9MPPrivState, num_cpu, 1), /* The Cortex-A9MP may have anything from 0 to 224 external interrupt * IRQ lines (with another 32 internal). We default to 64+32, which diff --git a/hw/cpu/arm11mpcore.c b/hw/cpu/arm11mpcore.c index 89c4e35..193fc18 100644 --- a/hw/cpu/arm11mpcore.c +++ b/hw/cpu/arm11mpcore.c @@ -131,7 +131,7 @@ static void mpcore_priv_initfn(Object *obj) object_initialize_child(obj, "wdtimer", &s->wdtimer, TYPE_ARM_MPTIMER); } -static Property mpcore_priv_properties[] = { +static const Property mpcore_priv_properties[] = { DEFINE_PROP_UINT32("num-cpu", ARM11MPCorePriveState, num_cpu, 1), /* The ARM11 MPCORE TRM says the on-chip controller may have * anything from 0 to 224 external interrupt IRQ lines (with another diff --git a/hw/cpu/cluster.c b/hw/cpu/cluster.c index 61289a8..8e43621 100644 --- a/hw/cpu/cluster.c +++ b/hw/cpu/cluster.c @@ -25,7 +25,7 @@ #include "hw/qdev-properties.h" #include "qapi/error.h" -static Property cpu_cluster_properties[] = { +static const Property cpu_cluster_properties[] = { DEFINE_PROP_UINT32("cluster-id", CPUClusterState, cluster_id, 0), DEFINE_PROP_END_OF_LIST() }; diff --git a/hw/cpu/realview_mpcore.c b/hw/cpu/realview_mpcore.c index 72c792e..9a0ff1d 100644 --- a/hw/cpu/realview_mpcore.c +++ b/hw/cpu/realview_mpcore.c @@ -108,7 +108,7 @@ static void mpcore_rirq_init(Object *obj) } } -static Property mpcore_rirq_properties[] = { +static const Property mpcore_rirq_properties[] = { DEFINE_PROP_UINT32("num-cpu", mpcore_rirq_state, num_cpu, 1), DEFINE_PROP_END_OF_LIST(), }; |