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| author | Cédric Le Goater <clg@kaod.org> | 2020-09-01 14:21:50 +0200 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2020-09-01 14:21:50 +0200 |
| commit | 740bc3a7e610a2a0daea9af9fd7f45d5e9ed78cc (patch) | |
| tree | 4eefae5c83b0596de09a2de59e8101c425c6fb36 /hw | |
| parent | 31fc566f5e9cbe36d4fa12d429eff4c634d681b4 (diff) | |
| download | qemu-740bc3a7e610a2a0daea9af9fd7f45d5e9ed78cc.zip qemu-740bc3a7e610a2a0daea9af9fd7f45d5e9ed78cc.tar.gz qemu-740bc3a7e610a2a0daea9af9fd7f45d5e9ed78cc.tar.bz2 | |
aspeed/scu: Fix valid access size on AST2400
The read access size of the SCU registers can be 1/2/4 bytes and write
is 4 bytes and all Aspeed models would need a .valid.accepts() handler.
For the moment, set the min access size to 1 byte to cover both read
and write operations on the AST2400 but keep the min access size of
the other SoCs to 4 bytes as this is an unusual access size.
This fixes support for some old firmware doing 2 bytes reads on the
AST2400 SoC.
Reported-by: Erik Smit <erik.lucas.smit@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-Id: <20200819100956.2216690-5-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/misc/aspeed_scu.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c index ec4fef9..7642224 100644 --- a/hw/misc/aspeed_scu.c +++ b/hw/misc/aspeed_scu.c @@ -328,9 +328,10 @@ static const MemoryRegionOps aspeed_ast2400_scu_ops = { .read = aspeed_scu_read, .write = aspeed_ast2400_scu_write, .endianness = DEVICE_LITTLE_ENDIAN, - .valid.min_access_size = 4, - .valid.max_access_size = 4, - .valid.unaligned = false, + .valid = { + .min_access_size = 1, + .max_access_size = 4, + }, }; static const MemoryRegionOps aspeed_ast2500_scu_ops = { |