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author | Peter Maydell <peter.maydell@linaro.org> | 2017-02-14 09:55:48 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2017-02-14 09:55:48 +0000 |
commit | 5dae13cd71f0755a1395b5a4cde635b8a6ee3f58 (patch) | |
tree | a9e193d020dbfa96afeb2aa9f08442554b415f26 /hw | |
parent | ec7a9bd5bb2c46c60cc0ec9b9d9f2ce404226ec0 (diff) | |
parent | 6597c28d618a3d16d468770b7c30a0237a8c8ea9 (diff) | |
download | qemu-5dae13cd71f0755a1395b5a4cde635b8a6ee3f58.zip qemu-5dae13cd71f0755a1395b5a4cde635b8a6ee3f58.tar.gz qemu-5dae13cd71f0755a1395b5a4cde635b8a6ee3f58.tar.bz2 |
Merge remote-tracking branch 'remotes/rth/tags/pull-or-20170214' into staging
Queued openrisc patches
# gpg: Signature made Mon 13 Feb 2017 21:21:03 GMT
# gpg: using RSA key 0xAD1270CC4DD0279B
# gpg: Good signature from "Richard Henderson <rth7680@gmail.com>"
# gpg: aka "Richard Henderson <rth@redhat.com>"
# gpg: aka "Richard Henderson <rth@twiddle.net>"
# Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC 16A4 AD12 70CC 4DD0 279B
* remotes/rth/tags/pull-or-20170214: (24 commits)
target/openrisc: Optimize for r0 being zero
target/openrisc: Tidy handling of delayed branches
target/openrisc: Tidy ppc/npc implementation
target/openrisc: Optimize l.jal to next
target/openrisc: Fix madd
target/openrisc: Implement muld, muldu, macu, msbu
target/openrisc: Represent MACHI:MACLO as a single unit
target/openrisc: Implement msync
target/openrisc: Enable trap, csync, msync, psync for user mode
target/openrisc: Set flags on helpers
target/openrisc: Use movcond where appropriate
target/openrisc: Keep SR_CY and SR_OV in a separate variables
target/openrisc: Keep SR_F in a separate variable
target/openrisc: Invert the decoding in dec_calc
target/openrisc: Put SR[OVE] in TB flags
target/openrisc: Streamline arithmetic and OVE
target/openrisc: Rationalize immediate extraction
target/openrisc: Tidy insn dumping
target/openrisc: Implement lwa, swa
target/openrisc: Fix exception handling status registers
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/openrisc/openrisc_sim.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c index 6d06d5b..fc0d096 100644 --- a/hw/openrisc/openrisc_sim.c +++ b/hw/openrisc/openrisc_sim.c @@ -139,10 +139,10 @@ static void openrisc_sim_init(MachineState *machine) static void openrisc_sim_machine_init(MachineClass *mc) { - mc->desc = "or32 simulation"; + mc->desc = "or1k simulation"; mc->init = openrisc_sim_init; mc->max_cpus = 1; mc->is_default = 1; } -DEFINE_MACHINE("or32-sim", openrisc_sim_machine_init) +DEFINE_MACHINE("or1k-sim", openrisc_sim_machine_init) |