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authorPeter Maydell <peter.maydell@linaro.org>2021-08-25 11:39:04 +0100
committerPeter Maydell <peter.maydell@linaro.org>2021-08-25 11:39:04 +0100
commit52fecb866923890b16202be8e0f360bf247db6a7 (patch)
tree074bcf048c514653c28042adbf13a1bb7f3c9499 /hw
parentd42685765653ec155fdf60910662f8830bdb2cef (diff)
parent24b1a6aa43615be22c7ee66bd68ec5675f6a6a9a (diff)
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qemu-52fecb866923890b16202be8e0f360bf247db6a7.tar.gz
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210825' into staging
target-arm queue: * More MVE emulation work * Implement M-profile trapping on division by zero * kvm: use RCU_READ_LOCK_GUARD() in kvm_arch_fixup_msi_route() * hw/char/pl011: add support for sending break * fsl-imx6ul: Instantiate SAI1/2/3 and ASRC as unimplemented devices * hw/dma/pl330: Add memory region to replace default * sbsa-ref: Rename SBSA_GWDT enum value * fsl-imx7: Instantiate SAI1/2/3 as unimplemented devices * docs: Document how to use gdb with unix sockets # gpg: Signature made Wed 25 Aug 2021 11:34:50 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20210825: (44 commits) docs: Document how to use gdb with unix sockets fsl-imx7: Instantiate SAI1/2/3 as unimplemented devices sbsa-ref: Rename SBSA_GWDT enum value hw/dma/pl330: Add memory region to replace default fsl-imx6ul: Instantiate SAI1/2/3 and ASRC as unimplemented devices hw/char/pl011: add support for sending break target/arm: kvm: use RCU_READ_LOCK_GUARD() in kvm_arch_fixup_msi_route() target/arm: Implement M-profile trapping on division by zero target/arm: Re-indent sdiv and udiv helpers target/arm: Implement MVE interleaving loads/stores target/arm: Implement MVE scatter-gather immediate forms target/arm: Implement MVE scatter-gather insns target/arm: Implement MVE VCTP target/arm: Implement MVE VPNOT target/arm: Implement MVE VMOV to/from 2 general-purpose registers target/arm: Implement MVE VMAXA, VMINA target/arm: Implement MVE VQABS, VQNEG target/arm: Implement MVE saturating doubling multiply accumulates target/arm: Implement MVE VMLA target/arm: Implement MVE VMLADAV and VMLSLDAV ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r--hw/arm/exynos4210.c3
-rw-r--r--hw/arm/fsl-imx6ul.c12
-rw-r--r--hw/arm/fsl-imx7.c7
-rw-r--r--hw/arm/sbsa-ref.c6
-rw-r--r--hw/arm/xilinx_zynq.c3
-rw-r--r--hw/char/pl011.c6
-rw-r--r--hw/dma/pl330.c26
7 files changed, 56 insertions, 7 deletions
diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
index 5c7a51b..0299e81 100644
--- a/hw/arm/exynos4210.c
+++ b/hw/arm/exynos4210.c
@@ -173,6 +173,9 @@ static DeviceState *pl330_create(uint32_t base, qemu_or_irq *orgate,
int i;
dev = qdev_new("pl330");
+ object_property_set_link(OBJECT(dev), "memory",
+ OBJECT(get_system_memory()),
+ &error_fatal);
qdev_prop_set_uint8(dev, "num_events", nevents);
qdev_prop_set_uint8(dev, "num_chnls", 8);
qdev_prop_set_uint8(dev, "num_periph_req", nreq);
diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c
index e0128d7..1d1a708 100644
--- a/hw/arm/fsl-imx6ul.c
+++ b/hw/arm/fsl-imx6ul.c
@@ -535,6 +535,13 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
create_unimplemented_device("sdma", FSL_IMX6UL_SDMA_ADDR, 0x4000);
/*
+ * SAI (Audio SSI (Synchronous Serial Interface))
+ */
+ create_unimplemented_device("sai1", FSL_IMX6UL_SAI1_ADDR, 0x4000);
+ create_unimplemented_device("sai2", FSL_IMX6UL_SAI2_ADDR, 0x4000);
+ create_unimplemented_device("sai3", FSL_IMX6UL_SAI3_ADDR, 0x4000);
+
+ /*
* PWM
*/
create_unimplemented_device("pwm1", FSL_IMX6UL_PWM1_ADDR, 0x4000);
@@ -543,6 +550,11 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
create_unimplemented_device("pwm4", FSL_IMX6UL_PWM4_ADDR, 0x4000);
/*
+ * Audio ASRC (asynchronous sample rate converter)
+ */
+ create_unimplemented_device("asrc", FSL_IMX6UL_ASRC_ADDR, 0x4000);
+
+ /*
* CAN
*/
create_unimplemented_device("can1", FSL_IMX6UL_CAN1_ADDR, 0x4000);
diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c
index 2ff2cab..149885f 100644
--- a/hw/arm/fsl-imx7.c
+++ b/hw/arm/fsl-imx7.c
@@ -468,6 +468,13 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
create_unimplemented_device("can2", FSL_IMX7_CAN2_ADDR, FSL_IMX7_CANn_SIZE);
/*
+ * SAI (Audio SSI (Synchronous Serial Interface))
+ */
+ create_unimplemented_device("sai1", FSL_IMX7_SAI1_ADDR, FSL_IMX7_SAIn_SIZE);
+ create_unimplemented_device("sai2", FSL_IMX7_SAI2_ADDR, FSL_IMX7_SAIn_SIZE);
+ create_unimplemented_device("sai2", FSL_IMX7_SAI3_ADDR, FSL_IMX7_SAIn_SIZE);
+
+ /*
* OCOTP
*/
create_unimplemented_device("ocotp", FSL_IMX7_OCOTP_ADDR,
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index c1629df..509c5f0 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -65,7 +65,7 @@ enum {
SBSA_GIC_DIST,
SBSA_GIC_REDIST,
SBSA_SECURE_EC,
- SBSA_GWDT,
+ SBSA_GWDT_WS0,
SBSA_GWDT_REFRESH,
SBSA_GWDT_CONTROL,
SBSA_SMMU,
@@ -140,7 +140,7 @@ static const int sbsa_ref_irqmap[] = {
[SBSA_AHCI] = 10,
[SBSA_EHCI] = 11,
[SBSA_SMMU] = 12, /* ... to 15 */
- [SBSA_GWDT] = 16,
+ [SBSA_GWDT_WS0] = 16,
};
static const char * const valid_cpus[] = {
@@ -481,7 +481,7 @@ static void create_wdt(const SBSAMachineState *sms)
hwaddr cbase = sbsa_ref_memmap[SBSA_GWDT_CONTROL].base;
DeviceState *dev = qdev_new(TYPE_WDT_SBSA);
SysBusDevice *s = SYS_BUS_DEVICE(dev);
- int irq = sbsa_ref_irqmap[SBSA_GWDT];
+ int irq = sbsa_ref_irqmap[SBSA_GWDT_WS0];
sysbus_realize_and_unref(s, &error_fatal);
sysbus_mmio_map(s, 0, rbase);
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 245af81..69c333e 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -312,6 +312,9 @@ static void zynq_init(MachineState *machine)
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[39-IRQ_OFFSET]);
dev = qdev_new("pl330");
+ object_property_set_link(OBJECT(dev), "memory",
+ OBJECT(address_space_mem),
+ &error_fatal);
qdev_prop_set_uint8(dev, "num_chnls", 8);
qdev_prop_set_uint8(dev, "num_periph_req", 4);
qdev_prop_set_uint8(dev, "num_events", 16);
diff --git a/hw/char/pl011.c b/hw/char/pl011.c
index dc85527..6e2d7f7 100644
--- a/hw/char/pl011.c
+++ b/hw/char/pl011.c
@@ -26,6 +26,7 @@
#include "hw/qdev-properties-system.h"
#include "migration/vmstate.h"
#include "chardev/char-fe.h"
+#include "chardev/char-serial.h"
#include "qemu/log.h"
#include "qemu/module.h"
#include "trace.h"
@@ -231,6 +232,11 @@ static void pl011_write(void *opaque, hwaddr offset,
s->read_count = 0;
s->read_pos = 0;
}
+ if ((s->lcr ^ value) & 0x1) {
+ int break_enable = value & 0x1;
+ qemu_chr_fe_ioctl(&s->chr, CHR_IOCTL_SERIAL_SET_BREAK,
+ &break_enable);
+ }
s->lcr = value;
pl011_set_read_trigger(s);
break;
diff --git a/hw/dma/pl330.c b/hw/dma/pl330.c
index 944ba29..0cb4619 100644
--- a/hw/dma/pl330.c
+++ b/hw/dma/pl330.c
@@ -269,6 +269,9 @@ struct PL330State {
uint8_t num_faulting;
uint8_t periph_busy[PL330_PERIPH_NUM];
+ /* Memory region that DMA operation access */
+ MemoryRegion *mem_mr;
+ AddressSpace *mem_as;
};
#define TYPE_PL330 "pl330"
@@ -1108,7 +1111,7 @@ static inline const PL330InsnDesc *pl330_fetch_insn(PL330Chan *ch)
uint8_t opcode;
int i;
- dma_memory_read(&address_space_memory, ch->pc, &opcode, 1);
+ dma_memory_read(ch->parent->mem_as, ch->pc, &opcode, 1);
for (i = 0; insn_desc[i].size; i++) {
if ((opcode & insn_desc[i].opmask) == insn_desc[i].opcode) {
return &insn_desc[i];
@@ -1122,7 +1125,7 @@ static inline void pl330_exec_insn(PL330Chan *ch, const PL330InsnDesc *insn)
uint8_t buf[PL330_INSN_MAXSIZE];
assert(insn->size <= PL330_INSN_MAXSIZE);
- dma_memory_read(&address_space_memory, ch->pc, buf, insn->size);
+ dma_memory_read(ch->parent->mem_as, ch->pc, buf, insn->size);
insn->exec(ch, buf[0], &buf[1], insn->size - 1);
}
@@ -1186,7 +1189,7 @@ static int pl330_exec_cycle(PL330Chan *channel)
if (q != NULL && q->len <= pl330_fifo_num_free(&s->fifo)) {
int len = q->len - (q->addr & (q->len - 1));
- dma_memory_read(&address_space_memory, q->addr, buf, len);
+ dma_memory_read(s->mem_as, q->addr, buf, len);
trace_pl330_exec_cycle(q->addr, len);
if (trace_event_get_state_backends(TRACE_PL330_HEXDUMP)) {
pl330_hexdump(buf, len);
@@ -1217,7 +1220,7 @@ static int pl330_exec_cycle(PL330Chan *channel)
fifo_res = pl330_fifo_get(&s->fifo, buf, len, q->tag);
}
if (fifo_res == PL330_FIFO_OK || q->z) {
- dma_memory_write(&address_space_memory, q->addr, buf, len);
+ dma_memory_write(s->mem_as, q->addr, buf, len);
trace_pl330_exec_cycle(q->addr, len);
if (trace_event_get_state_backends(TRACE_PL330_HEXDUMP)) {
pl330_hexdump(buf, len);
@@ -1562,6 +1565,18 @@ static void pl330_realize(DeviceState *dev, Error **errp)
"dma", PL330_IOMEM_SIZE);
sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem);
+ if (!s->mem_mr) {
+ error_setg(errp, "'memory' link is not set");
+ return;
+ } else if (s->mem_mr == get_system_memory()) {
+ /* Avoid creating new AS for system memory. */
+ s->mem_as = &address_space_memory;
+ } else {
+ s->mem_as = g_new0(AddressSpace, 1);
+ address_space_init(s->mem_as, s->mem_mr,
+ memory_region_name(s->mem_mr));
+ }
+
s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, pl330_exec_cycle_timer, s);
s->cfg[0] = (s->mgr_ns_at_rst ? 0x4 : 0) |
@@ -1656,6 +1671,9 @@ static Property pl330_properties[] = {
DEFINE_PROP_UINT8("rd_q_dep", PL330State, rd_q_dep, 16),
DEFINE_PROP_UINT16("data_buffer_dep", PL330State, data_buffer_dep, 256),
+ DEFINE_PROP_LINK("memory", PL330State, mem_mr,
+ TYPE_MEMORY_REGION, MemoryRegion *),
+
DEFINE_PROP_END_OF_LIST(),
};