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author | Bin Meng <bmeng.cn@gmail.com> | 2021-09-13 16:07:21 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2021-09-13 16:07:21 +0100 |
commit | 47c305f6f2761c5be9b5a69721cd586aaae0d43e (patch) | |
tree | 719ead0caffdeab8e79a95eaeaf2ba37c4d54a70 /hw | |
parent | 9834ecaaea8dfe1def47431f096a2b77de3583a1 (diff) | |
download | qemu-47c305f6f2761c5be9b5a69721cd586aaae0d43e.zip qemu-47c305f6f2761c5be9b5a69721cd586aaae0d43e.tar.gz qemu-47c305f6f2761c5be9b5a69721cd586aaae0d43e.tar.bz2 |
hw/char: cadence_uart: Log a guest error when device is unclocked or in reset
We've got SW that expects FSBL (Bootlooader) to setup clocks and
resets. It's quite common that users run that SW on QEMU without
FSBL (FSBL typically requires the Xilinx tools installed). That's
fine, since users can stil use -device loader to enable clocks etc.
To help folks understand what's going, a log (guest-error) message
would be helpful here. In particular with the serial port since
things will go very quiet if they get things wrong.
Suggested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210901124521.30599-7-bmeng.cn@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/char/cadence_uart.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c index 5f5a464..c069a30 100644 --- a/hw/char/cadence_uart.c +++ b/hw/char/cadence_uart.c @@ -240,6 +240,8 @@ static int uart_can_receive(void *opaque) /* ignore characters when unclocked or in reset */ if (!clock_is_enabled(s->refclk) || device_is_in_reset(DEVICE(s))) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: uart is unclocked or in reset\n", + __func__); return 0; } @@ -376,6 +378,8 @@ static void uart_event(void *opaque, QEMUChrEvent event) /* ignore characters when unclocked or in reset */ if (!clock_is_enabled(s->refclk) || device_is_in_reset(DEVICE(s))) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: uart is unclocked or in reset\n", + __func__); return; } @@ -413,6 +417,8 @@ static MemTxResult uart_write(void *opaque, hwaddr offset, /* ignore access when unclocked or in reset */ if (!clock_is_enabled(s->refclk) || device_is_in_reset(DEVICE(s))) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: uart is unclocked or in reset\n", + __func__); return MEMTX_ERROR; } @@ -478,6 +484,8 @@ static MemTxResult uart_read(void *opaque, hwaddr offset, /* ignore access when unclocked or in reset */ if (!clock_is_enabled(s->refclk) || device_is_in_reset(DEVICE(s))) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: uart is unclocked or in reset\n", + __func__); return MEMTX_ERROR; } |