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| author | Xiaojuan Yang <yangxiaojuan@loongson.cn> | 2022-07-01 17:34:04 +0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2022-07-04 11:08:58 +0530 |
| commit | 4623367697ebb531fce89a10f9c73a820a5ad82a (patch) | |
| tree | b2319dd46f0d9d3e346007ec9f995e0e9553138e /hw | |
| parent | 59e52dcff7254603f3b5bf527806a830f016bf82 (diff) | |
| download | qemu-4623367697ebb531fce89a10f9c73a820a5ad82a.zip qemu-4623367697ebb531fce89a10f9c73a820a5ad82a.tar.gz qemu-4623367697ebb531fce89a10f9c73a820a5ad82a.tar.bz2 | |
target/loongarch: Fix the meaning of ECFG reg's VS field
By the manual of LoongArch CSR, the VS field(18:16 bits) of
ECFG reg means that the number of instructions between each
exception entry is 2^VS.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220701093407.2150607-9-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'hw')
0 files changed, 0 insertions, 0 deletions