diff options
| author | Jamin Lin <jamin_lin@aspeedtech.com> | 2025-03-07 11:59:21 +0800 |
|---|---|---|
| committer | Cédric Le Goater <clg@redhat.com> | 2025-03-09 14:36:53 +0100 |
| commit | 35c909cd80d4095690bb1c98c263b01d9617de65 (patch) | |
| tree | 48737cc97d615b0534e29c2489ced2d0c390e06f /hw | |
| parent | 63f3618f9be0f28ff36cd4b5685877715b97e669 (diff) | |
| download | qemu-35c909cd80d4095690bb1c98c263b01d9617de65.zip qemu-35c909cd80d4095690bb1c98c263b01d9617de65.tar.gz qemu-35c909cd80d4095690bb1c98c263b01d9617de65.tar.bz2 | |
hw/intc/aspeed: Add support for multiple output pins in INTC
Added support for multiple output pins in the INTC controller to
accommodate the AST2700 A1.
Introduced "num_outpins" to represent the number of output pins. Updated the
IRQ handling logic to initialize and connect output pins separately from input
pins. Modified the "aspeed_soc_ast2700_realize" function to connect source
orgates to INTC and INTC to GIC128 - GIC136. Updated the "aspeed_intc_realize"
function to initialize output pins.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250307035945.3698802-13-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/arm/aspeed_ast27x0.c | 6 | ||||
| -rw-r--r-- | hw/intc/aspeed_intc.c | 4 |
2 files changed, 9 insertions, 1 deletions
diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c index 1a3eb02..3cb9521 100644 --- a/hw/arm/aspeed_ast27x0.c +++ b/hw/arm/aspeed_ast27x0.c @@ -534,10 +534,14 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp) aspeed_mmio_map(s, SYS_BUS_DEVICE(&a->intc), 0, sc->memmap[ASPEED_DEV_INTC]); - /* GICINT orgates -> INTC -> GIC */ + /* source orgates -> INTC */ for (i = 0; i < ic->num_inpins; i++) { qdev_connect_gpio_out(DEVICE(&a->intc.orgates[i]), 0, qdev_get_gpio_in(DEVICE(&a->intc), i)); + } + + /* INTC -> GIC128 - GIC136 */ + for (i = 0; i < ic->num_outpins; i++) { sysbus_connect_irq(SYS_BUS_DEVICE(&a->intc), i, qdev_get_gpio_in(DEVICE(&a->gic), aspeed_soc_ast2700_gic_intcmap[i].irq)); diff --git a/hw/intc/aspeed_intc.c b/hw/intc/aspeed_intc.c index 217fda6..6f37afc 100644 --- a/hw/intc/aspeed_intc.c +++ b/hw/intc/aspeed_intc.c @@ -347,6 +347,9 @@ static void aspeed_intc_realize(DeviceState *dev, Error **errp) if (!qdev_realize(DEVICE(&s->orgates[i]), NULL, errp)) { return; } + } + + for (i = 0; i < aic->num_outpins; i++) { sysbus_init_irq(sbd, &s->output_pins[i]); } } @@ -391,6 +394,7 @@ static void aspeed_2700_intc_class_init(ObjectClass *klass, void *data) dc->desc = "ASPEED 2700 INTC Controller"; aic->num_lines = 32; aic->num_inpins = 9; + aic->num_outpins = 9; aic->mem_size = 0x4000; aic->nr_regs = 0x808 >> 2; aic->reg_offset = 0x1000; |