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author | Peter Maydell <peter.maydell@linaro.org> | 2017-07-17 13:36:09 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2017-07-17 13:36:09 +0100 |
commit | 3587393922dec51ebcbe6088649aface38cd89f6 (patch) | |
tree | c94ee0101b9b9ce9625da9f7c6373703de5e4b65 /hw | |
parent | 6dbdf4ec3332dd976ce2b45a431909dedc31bcae (diff) | |
download | qemu-3587393922dec51ebcbe6088649aface38cd89f6.zip qemu-3587393922dec51ebcbe6088649aface38cd89f6.tar.gz qemu-3587393922dec51ebcbe6088649aface38cd89f6.tar.bz2 |
hw/arm/mps2: Add ethernet
The MPS2 FPGA images support ethernet via a LAN9220. We use
QEMU's LAN9118 model, which is software compatible except
that it is missing the checksum-offload feature.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1500029487-14822-9-git-send-email-peter.maydell@linaro.org
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/arm/mps2.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c index 80ee79e..f727b43 100644 --- a/hw/arm/mps2.c +++ b/hw/arm/mps2.c @@ -35,6 +35,8 @@ #include "hw/char/cmsdk-apb-uart.h" #include "hw/timer/cmsdk-apb-timer.h" #include "hw/misc/mps2-scc.h" +#include "hw/devices.h" +#include "net/net.h" typedef enum MPS2FPGAType { FPGA_AN385, @@ -209,7 +211,6 @@ static void mps2_common_init(MachineState *machine) create_unimplemented_device("Extra peripheral region @0x40020000", 0x40020000, 0x00010000); create_unimplemented_device("RESERVED 4", 0x40030000, 0x001D0000); - create_unimplemented_device("Ethernet", 0x40200000, 0x00100000); create_unimplemented_device("VGA", 0x41000000, 0x0200000); switch (mmc->fpga_type) { @@ -310,6 +311,13 @@ static void mps2_common_init(MachineState *machine) &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(sccdev), 0, 0x4002f000); + /* In hardware this is a LAN9220; the LAN9118 is software compatible + * except that it doesn't support the checksum-offload feature. + */ + lan9118_init(&nd_table[0], 0x40200000, + qdev_get_gpio_in(armv7m, + mmc->fpga_type == FPGA_AN385 ? 13 : 47)); + system_clock_scale = NANOSECONDS_PER_SECOND / SYSCLK_FRQ; armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, |