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| author | Glenn Miles <milesg@linux.ibm.com> | 2024-11-14 15:21:19 -0600 |
|---|---|---|
| committer | Nicholas Piggin <npiggin@gmail.com> | 2024-11-27 02:49:31 +1000 |
| commit | 2fc0a78a57731fda50d5b01e16fd68681900f709 (patch) | |
| tree | ba9a00ea37f70a8e402201bbdc509a48b52a5b18 /hw | |
| parent | 96746f7a95a6e32d6578d417ae41dc24c564fafa (diff) | |
| download | qemu-2fc0a78a57731fda50d5b01e16fd68681900f709.zip qemu-2fc0a78a57731fda50d5b01e16fd68681900f709.tar.gz qemu-2fc0a78a57731fda50d5b01e16fd68681900f709.tar.bz2 | |
target/ppc: Fix THREAD_SIBLING_FOREACH for multi-socket
The THREAD_SIBLING_FOREACH macro wasn't excluding threads from other
chips. Add chip_index field to the thread state and add a check for the
new field in the macro.
Fixes: b769d4c8f4c6 ("target/ppc: Add initial flags and helpers for SMT support")
Signed-off-by: Glenn Miles <milesg@linux.ibm.com>
[npiggin: set chip_index for spapr too]
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/ppc/pnv_core.c | 2 | ||||
| -rw-r--r-- | hw/ppc/spapr_cpu_core.c | 1 |
2 files changed, 3 insertions, 0 deletions
diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index cbfac49..e6b0229 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -322,6 +322,8 @@ static void pnv_core_cpu_realize(PnvCore *pc, PowerPCCPU *cpu, Error **errp, pir_spr->default_value = pir; tir_spr->default_value = tir; + env->chip_index = pc->chip->chip_id; + if (pc->big_core) { /* 2 "small cores" get the same core index for SMT operations */ env->core_index = core_hwid >> 1; diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index ada439e..135f86a 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -313,6 +313,7 @@ static PowerPCCPU *spapr_create_vcpu(SpaprCpuCore *sc, int i, Error **errp) return NULL; } + env->chip_index = sc->node_id; env->core_index = cc->core_id; cpu->node_id = sc->node_id; |