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authorJohan Karlsson <Johan.Karlsson@enea.com>2015-06-15 18:06:07 +0100
committerPeter Maydell <peter.maydell@linaro.org>2015-06-15 18:06:07 +0100
commit235069a380147e31236b94c31528fc5170c3a421 (patch)
tree917b530bce82aa4e390aefdad791848db90fd0ec /hw
parent4e42a6ca37e39e56725518851f4388e46bd91129 (diff)
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qemu-235069a380147e31236b94c31528fc5170c3a421.tar.gz
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arm_gic: gic_update should always update all cores
This patch fixes so that gic_update always updates all the cores with new pending irq states. If the function returns early it is possible to get interrupts that has already been acknowledged. Signed-off-by: Johan Karlsson <johan.karlsson@enea.com> [PMM: rebased to apply to current master] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r--hw/intc/arm_gic.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
index c1d2e70..454bfd7 100644
--- a/hw/intc/arm_gic.c
+++ b/hw/intc/arm_gic.c
@@ -71,7 +71,7 @@ void gic_update(GICState *s)
|| !(s->cpu_ctlr[cpu] & (GICC_CTLR_EN_GRP0 | GICC_CTLR_EN_GRP1))) {
qemu_irq_lower(s->parent_irq[cpu]);
qemu_irq_lower(s->parent_fiq[cpu]);
- return;
+ continue;
}
best_prio = 0x100;
best_irq = 1023;