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authorBernhard Beschow <shentey@gmail.com>2023-03-04 12:40:41 +0100
committerDaniel Henrique Barboza <danielhb413@gmail.com>2023-05-28 07:13:54 -0300
commit2237af5e60ada06d90bf714e85523deafd936b9b (patch)
tree26acc6490518b1f17ee3cee4a006ae493129f268 /hw
parentccc5a4c5e108775667ffc25182cd2ba2326ac979 (diff)
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hw/ppc/prep: Fix wiring of PIC -> CPU interrupt
Commit cef2e7148e32 ("hw/isa/i82378: Remove intermediate IRQ forwarder") passes s->cpu_intr to i8259_init() in i82378_realize() directly. However, s- >cpu_intr isn't initialized yet since that happens after the south bridge's pci_realize_and_unref() in board code. Fix this by initializing s->cpu_intr before realizing the south bridge. Fixes: cef2e7148e32 ("hw/isa/i82378: Remove intermediate IRQ forwarder") Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20230304114043.121024-4-shentey@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/ppc/prep.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
index 4610abd..33bf232 100644
--- a/hw/ppc/prep.c
+++ b/hw/ppc/prep.c
@@ -271,9 +271,11 @@ static void ibm_40p_init(MachineState *machine)
}
/* PCI -> ISA bridge */
- i82378_dev = DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(11, 0), "i82378"));
+ i82378_dev = DEVICE(pci_new(PCI_DEVFN(11, 0), "i82378"));
qdev_connect_gpio_out(i82378_dev, 0,
qdev_get_gpio_in(DEVICE(cpu), PPC6xx_INPUT_INT));
+ qdev_realize_and_unref(i82378_dev, BUS(pci_bus), &error_fatal);
+
sysbus_connect_irq(pcihost, 0, qdev_get_gpio_in(i82378_dev, 15));
isa_bus = ISA_BUS(qdev_get_child_bus(i82378_dev, "isa.0"));