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| author | Irina Ryapolova <irina.ryapolova@syntacore.com> | 2024-01-09 17:59:22 +0300 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2024-03-08 16:38:09 +1000 |
| commit | 1349f969520856bb1310dbe264e54ad29b7ff352 (patch) | |
| tree | e2007dd53482201a6403ac93672514a3a90c877f /hw | |
| parent | 57020a464c1c8ff1d40a94a4eca6c6955ca0a6e1 (diff) | |
| download | qemu-1349f969520856bb1310dbe264e54ad29b7ff352.zip qemu-1349f969520856bb1310dbe264e54ad29b7ff352.tar.gz qemu-1349f969520856bb1310dbe264e54ad29b7ff352.tar.bz2 | |
target/riscv: UPDATE xATP write CSR
Added xATP_MODE validation for vsatp/hgatp CSRs.
The xATP register is an SXLEN-bit read/write WARL register, so
the legal value must be returned (See riscv-privileged-20211203, SATP/VSATP/HGATP CSRs).
Signed-off-by: Irina Ryapolova <irina.ryapolova@syntacore.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240109145923.37893-2-irina.ryapolova@syntacore.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw')
0 files changed, 0 insertions, 0 deletions