diff options
author | Bin Meng <bmeng@tinylab.org> | 2022-12-29 17:18:21 +0800 |
---|---|---|
committer | Alistair Francis <alistair.francis@wdc.com> | 2023-01-20 10:14:13 +1000 |
commit | 1237c2d6942709cf82b999b6f6e8624b86ac495f (patch) | |
tree | d6ab4b5aed46ad42e20a8a71b04be0b24721611c /hw | |
parent | dadee9e3ce6ee6aad36fe3027eaa0f947358f812 (diff) | |
download | qemu-1237c2d6942709cf82b999b6f6e8624b86ac495f.zip qemu-1237c2d6942709cf82b999b6f6e8624b86ac495f.tar.gz qemu-1237c2d6942709cf82b999b6f6e8624b86ac495f.tar.bz2 |
hw/char: riscv_htif: Move registers from CPUArchState to HTIFState
At present for some unknown reason the HTIF registers (fromhost &
tohost) are defined in the RISC-V CPUArchState. It should really
be put in the HTIFState struct as it is only meaningful to HTIF.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20221229091828.1945072-6-bmeng@tinylab.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/char/riscv_htif.c | 35 | ||||
-rw-r--r-- | hw/riscv/spike.c | 3 |
2 files changed, 18 insertions, 20 deletions
diff --git a/hw/char/riscv_htif.c b/hw/char/riscv_htif.c index f28976b..3bb0a37 100644 --- a/hw/char/riscv_htif.c +++ b/hw/char/riscv_htif.c @@ -100,7 +100,7 @@ static void htif_recv(void *opaque, const uint8_t *buf, int size) uint64_t val_written = s->pending_read; uint64_t resp = 0x100 | *buf; - s->env->mfromhost = (val_written >> 48 << 48) | (resp << 16 >> 16); + s->fromhost = (val_written >> 48 << 48) | (resp << 16 >> 16); } /* @@ -175,7 +175,7 @@ static void htif_handle_tohost_write(HTIFState *s, uint64_t val_written) if (cmd == HTIF_CONSOLE_CMD_GETC) { /* this should be a queue, but not yet implemented as such */ s->pending_read = val_written; - s->env->mtohost = 0; /* clear to indicate we read */ + s->tohost = 0; /* clear to indicate we read */ return; } else if (cmd == HTIF_CONSOLE_CMD_PUTC) { qemu_chr_fe_write(&s->chr, (uint8_t *)&payload, 1); @@ -195,11 +195,11 @@ static void htif_handle_tohost_write(HTIFState *s, uint64_t val_written) * HTIF needs protocol documentation and a more complete state machine. * * while (!s->fromhost_inprogress && - * s->env->mfromhost != 0x0) { + * s->fromhost != 0x0) { * } */ - s->env->mfromhost = (val_written >> 48 << 48) | (resp << 16 >> 16); - s->env->mtohost = 0; /* clear to indicate we read */ + s->fromhost = (val_written >> 48 << 48) | (resp << 16 >> 16); + s->tohost = 0; /* clear to indicate we read */ } #define TOHOST_OFFSET1 (s->tohost_offset) @@ -212,13 +212,13 @@ static uint64_t htif_mm_read(void *opaque, hwaddr addr, unsigned size) { HTIFState *s = opaque; if (addr == TOHOST_OFFSET1) { - return s->env->mtohost & 0xFFFFFFFF; + return s->tohost & 0xFFFFFFFF; } else if (addr == TOHOST_OFFSET2) { - return (s->env->mtohost >> 32) & 0xFFFFFFFF; + return (s->tohost >> 32) & 0xFFFFFFFF; } else if (addr == FROMHOST_OFFSET1) { - return s->env->mfromhost & 0xFFFFFFFF; + return s->fromhost & 0xFFFFFFFF; } else if (addr == FROMHOST_OFFSET2) { - return (s->env->mfromhost >> 32) & 0xFFFFFFFF; + return (s->fromhost >> 32) & 0xFFFFFFFF; } else { qemu_log("Invalid htif read: address %016" PRIx64 "\n", (uint64_t)addr); @@ -232,22 +232,22 @@ static void htif_mm_write(void *opaque, hwaddr addr, { HTIFState *s = opaque; if (addr == TOHOST_OFFSET1) { - if (s->env->mtohost == 0x0) { + if (s->tohost == 0x0) { s->allow_tohost = 1; - s->env->mtohost = value & 0xFFFFFFFF; + s->tohost = value & 0xFFFFFFFF; } else { s->allow_tohost = 0; } } else if (addr == TOHOST_OFFSET2) { if (s->allow_tohost) { - s->env->mtohost |= value << 32; - htif_handle_tohost_write(s, s->env->mtohost); + s->tohost |= value << 32; + htif_handle_tohost_write(s, s->tohost); } } else if (addr == FROMHOST_OFFSET1) { s->fromhost_inprogress = 1; - s->env->mfromhost = value & 0xFFFFFFFF; + s->fromhost = value & 0xFFFFFFFF; } else if (addr == FROMHOST_OFFSET2) { - s->env->mfromhost |= value << 32; + s->fromhost |= value << 32; s->fromhost_inprogress = 0; } else { qemu_log("Invalid htif write: address %016" PRIx64 "\n", @@ -265,8 +265,8 @@ bool htif_uses_elf_symbols(void) return (address_symbol_set == 3) ? true : false; } -HTIFState *htif_mm_init(MemoryRegion *address_space, CPURISCVState *env, - Chardev *chr, uint64_t nonelf_base) +HTIFState *htif_mm_init(MemoryRegion *address_space, Chardev *chr, + uint64_t nonelf_base) { uint64_t base, size, tohost_offset, fromhost_offset; @@ -281,7 +281,6 @@ HTIFState *htif_mm_init(MemoryRegion *address_space, CPURISCVState *env, fromhost_offset = fromhost_addr - base; HTIFState *s = g_new0(HTIFState, 1); - s->env = env; s->tohost_offset = tohost_offset; s->fromhost_offset = fromhost_offset; s->pending_read = 0; diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c index bc4953c..fb4152c 100644 --- a/hw/riscv/spike.c +++ b/hw/riscv/spike.c @@ -316,8 +316,7 @@ static void spike_board_init(MachineState *machine) fdt_load_addr); /* initialize HTIF using symbols found in load_kernel */ - htif_mm_init(system_memory, &s->soc[0].harts[0].env, - serial_hd(0), memmap[SPIKE_HTIF].base); + htif_mm_init(system_memory, serial_hd(0), memmap[SPIKE_HTIF].base); } static void spike_machine_instance_init(Object *obj) |